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* QtCore: Remove Windows CE.Friedemann Kleint2016-03-301-28/+1
| | | | | | | | | Remove QSysInfo::WV_CE_5/6 enumeration values, #ifdef sections for Q_OS_WINCE and wince .pro file clauses in library, examples and tests. Task-number: QTBUG-51673 Change-Id: Ib63463445f3a26e04d018b193e4655030002f5f9 Reviewed-by: Lars Knoll <lars.knoll@theqtcompany.com>
* Merge remote-tracking branch 'origin/5.6' into 5.7Liang Qi2016-03-111-0/+22
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change partially reverts 1bfc7f68 about QT_HAS_BUILTIN define and undef in src/corelib/tools/qsimd_p.h. This change is also squashed with "Fall back to c++11 standard compiler flag for host builds" which is done by Peter Seiderer. Conflicts: mkspecs/features/default_post.prf src/3rdparty/sqlite/0001-Fixing-the-SQLite3-build-for-WEC2013-again.patch src/3rdparty/sqlite/sqlite3.c src/corelib/tools/qsimd_p.h src/gui/kernel/qevent.cpp src/gui/kernel/qwindowsysteminterface.cpp src/gui/kernel/qwindowsysteminterface_p.h src/plugins/bearer/blackberry/blackberry.pro src/plugins/platforms/cocoa/qcocoasystemsettings.mm src/plugins/platformthemes/gtk2/gtk2.pro src/plugins/styles/bb10style/bb10style.pro src/sql/drivers/sqlite2/qsql_sqlite2.cpp tools/configure/configureapp.cpp Task-number: QTBUG-51644 Done-with: Peter Seiderer <ps.report@gmx.net> Change-Id: I6100d6ace31b2e8d41a95f0b5d5ebf8f1fd88b44
| * QString, QJson, QHash: Fix UBs involving unaligned loadsMarc Mutz2016-03-091-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Found by UBSan: src/corelib/tools/qstring.cpp:587:42: runtime error: load of misaligned address 0x2acbf4b7551b for type 'const long long int', which requires 8 byte alignment src/corelib/json/qjson_p.h:405:30: runtime error: store to misaligned address 0x0000019b1e52 for type 'quint64', which requires 8 byte alignment src/corelib/tools/qhash.cpp:116:27: runtime error: load of misaligned address 0x2b8f9ce80e85 for type 'const qlonglong', which requires 8 byte alignment src/corelib/tools/qhash.cpp:133:26: runtime error: load of misaligned address 0x2b8f9ce80e8d for type 'const ushort', which requires 2 byte alignment Fix by memcpy()ing into a local variable. Wrap this trick in template functions in qsimd_p.h. These are marked as always- inline and use __builtin_memcpy() where available in an attempt to avoid the memcpy() function call overhead in debug builds. While this looks prohibitively expensive, from the pov of the C++ abstract machine, it is 100% equivalent, except for the absence of undefined behavior. In one case, the cast produces a local temporary which is then copied into the function, and in the other case, that local variable comes from return value of qUnalignedLoad(). Consequently, GCC compiles these two versions into identical assembler code (only verfied for ucstrncmp, but there's no reason to believe that it wouldn't hold for the other cases, too). Task-number: QTBUG-51651 Change-Id: Ia50d4a1d7580b6f803e0895c9f3d89c7da37840c Reviewed-by: Olivier Goffart (Woboq GmbH) <ogoffart@woboq.com> Reviewed-by: Allan Sandfeld Jensen <allan.jensen@theqtcompany.com>
| * Haiku: Fix compilation of corelibTobias Koenig2016-01-181-1/+1
| | | | | | | | | | | | Change-Id: I8f962ac7ee85af50a573a451f54931d6c0dd67eb Reviewed-by: Augustin Cavalier <waddlesplash@gmail.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* | iOS: rely on built-in compiler macros to check for CPU featuresErik Verbruggen2016-03-041-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | iOS cannot do runtime feature detection, and querying the CPU is only allowed in kernel mode (or beyond), so we have to decide the features at compile time, in which case we might as well use the fallback code path that uses the built in __ARM_* macros to point out which features are supported, instead of hard-coding the features for iOS. Change-Id: Ie507c0d8e962a7bdab16508c8b8122645276512e Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@theqtcompany.com> Reviewed-by: Tor Arne Vestbø <tor.arne.vestbo@theqtcompany.com>
* | Fix detectProcessorFeatures() fallback path on ARMTor Arne Vestbø2016-03-011-2/+2
| | | | | | | | | | | | | | Change-Id: Ifcad547caf2d2a7ad7aa1ccb4fbed08810905cee Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@theqtcompany.com> Reviewed-by: Erik Verbruggen <erik.verbruggen@theqtcompany.com> Reviewed-by: Tor Arne Vestbø <tor.arne.vestbo@theqtcompany.com>
* | Updated license headersJani Heikkinen2016-01-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | From Qt 5.7 -> tools & applications are lisenced under GPL v3 with some exceptions, see http://blog.qt.io/blog/2016/01/13/new-agreement-with-the-kde-free-qt-foundation/ Updated license headers to use new GPL-EXCEPT header instead of LGPL21 one (in those files which will be under GPL 3 with exceptions) Change-Id: I42a473ddc97101492a60b9287d90979d9eb35ae1 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com> Reviewed-by: Lars Knoll <lars.knoll@theqtcompany.com>
* | Replace ffsll with new qCountTrailingZeroBitsTobias Koenig2016-01-191-32/+2
| | | | | | | | | | Change-Id: I44898909181e25247bf96cf4462971ac23c2a3ac Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* | Updated license headersJani Heikkinen2016-01-151-14/+20
| | | | | | | | | | | | | | | | | | | | | | From Qt 5.7 -> LGPL v2.1 isn't an option anymore, see http://blog.qt.io/blog/2016/01/13/new-agreement-with-the-kde-free-qt-foundation/ Updated license headers to use new LGPL header instead of LGPL21 one (in those files which will be under LGPL v3) Change-Id: I046ec3e47b1876cd7b4b0353a576b352e3a946d9 Reviewed-by: Lars Knoll <lars.knoll@theqtcompany.com>
* | ARMv8: add crc32 feature detection.Erik Verbruggen2016-01-131-5/+41
| | | | | | | | | | Change-Id: I3cfac90dfa137d0bf3d124d87262eb2dbb56459c Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* | Use intrinsics for GHS toolchain for CPU feature detection.Rolland Dudemaine2015-12-041-1/+26
| | | | | | | | | | | | | | | | cpuid and cpuidex are available as intrinsics, but the GNU-style assembly is needed for xgetbv. Change-Id: Ib9f280ac6b69b7ffb9c39289b52fa4af5e2de9ba Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* | Use Q_UNLIKELY for every qFatal()/qCritical()Marc Mutz2015-11-291-1/+1
|/ | | | | | | | | | | | | | | | | | | | | If, after checking a condition, we issue a qFatal() or a qCritical(), by definition that check is unlikely to be true. Tell the compiler so it can move the error handling code out of the normal code path to increase the effective icache size. Moved conditional code around where possible so that we could always use Q_UNLIKELY, instead of having to revert to Q_LIKELY here and there. In some cases, simplified the expressions newly wrapped in Q_UNLIKELY as a drive-by. Change-Id: I67537d62b04bc6977d69254690c5ebbdf98bfd6d Reviewed-by: Konstantin Ritt <ritt.ks@gmail.com> Reviewed-by: Olivier Goffart (Woboq GmbH) <ogoffart@woboq.com>
* Fix build with OS X 10.8 SDKThiago Macieira2015-11-181-1/+1
| | | | | | | | | The ffsll function is missing with that SDK, but Clang and GCC support it as the builtin. Change-Id: I9f4d900898814b569c1affff140e15fb59fb45d8 Reviewed-by: Samuel Gaist <samuel.gaist@edeltech.ch> Reviewed-by: Jake Petroules <jake.petroules@theqtcompany.com>
* Fix left-shift wider than an int's widthThiago Macieira2015-10-161-1/+1
| | | | | | | | The other left shifts in this file already have the Q_UINT64_C wrapper. This one was missed. Change-Id: I42e7ef1a481840699a8dffff140d758ac370c402 Reviewed-by: Marc Mutz <marc.mutz@kdab.com>
* Expand reporting of the Intel instruction set extensionsThiago Macieira2015-09-221-12/+63
| | | | | | | | | | | | | | | Detection for most of them is free because we're loading the entire registers anyway. The only exception is AVX512VBMI, which is in a new register we hadn't yet read from. I've also added the new GCC names so they can be used with QT_FUNCTION_TARGET. The only two exceptions are "movbe" and "popcnt", which are extremely restricted in use and we are not likely to have code dedicated to using them. Change-Id: Ib306f8f647014b399b87ffff13f1d8fd29e58be0 Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@theqtcompany.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Reorganize the bits for the CPU feature detectionThiago Macieira2015-09-221-61/+121
| | | | | | | | | | | | | | | Instead of trying to detect one bit and set another, let's just use the bits from the x86 CPUID instruction on x86. This makes use of the full 64-bit space now. Since MSVC doesn't like enums bigger than 32-bit, we have to store the bit number instead of the actual bit value in the constant. For that reason, I also renamed the constants, to catch anyone who was using them directly, instead of through qCpuHasFeature. Change-Id: Ib306f8f647014b399b87ffff13f1d587692d827a Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@theqtcompany.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Change the CPU feature status word to be 64-bit instead of 32-bitThiago Macieira2015-09-111-20/+31
| | | | | | | | I'm going to need the extra bits for x86. Change-Id: Ib306f8f647014b399b87ffff13f1d3d23e138518 Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@theqtcompany.com> Reviewed-by: Allan Sandfeld Jensen <allan.jensen@theqtcompany.com>
* Merge remote-tracking branch 'origin/5.5' into devFrederik Gladhorn2015-08-061-3/+15
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: doc/global/qt-cpp-defines.qdocconf src/3rdparty/forkfd/forkfd.c src/corelib/codecs/qtextcodec.cpp src/corelib/kernel/qmetatype.cpp src/corelib/tools/qset.qdoc src/gui/accessible/qaccessible.cpp src/gui/image/qpixmapcache.cpp src/opengl/qgl.cpp src/tools/qdoc/generator.cpp src/widgets/kernel/qwidget.cpp tests/auto/widgets/widgets/qcombobox/tst_qcombobox.cpp Change-Id: I4fbe1fa756a54c6843aa75f4ef70a1069ba7b085
| * Don't check if Pentium's CPUID leaf 1 existsThiago Macieira2015-08-061-0/+4
| | | | | | | | | | | | | | | | | | | | It does. When CPUID was introduced in late 486, it already supported leaf 1. That means all Pentium-class systems (including Intel's new Quark systems) have CPUID and they have at least leaf 1. Change-Id: Ib306f8f647014b399b87ffff13f1d5d2530d9ddd Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@theqtcompany.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
| * Remove attempt at detecting compile-time HLEThiago Macieira2015-07-201-2/+1
| | | | | | | | | | | | | | | | There's no __HLE__ macro and there won't be, since the HLE prefix can be run on older CPUs. There's no need for runtime detection. Change-Id: Ib306f8f647014b399b87ffff13f1daba0e654b02 Reviewed-by: Olivier Goffart (Woboq GmbH) <ogoffart@woboq.com>
| * Don't complain about missing CPU features under ValgrindThiago Macieira2015-07-181-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | If you're running Qt under valgrind, it stands to reason that you know what you're doing. In particular, Valgrind does support AVX and AVX2 instructions, but some versions seem to be missing the necessary CPUID bits. Change-Id: I9a75ad8521ae4e5cbbe5ffff13d1940f6fa5c4f4 Reviewed-by: Olivier Goffart (Woboq GmbH) <ogoffart@woboq.com> Reviewed-by: David Faure <david.faure@kdab.com>
* | Fixing the build of the SIMD support for WEC2013.Bjoern Breitmeyer2015-05-121-1/+3
|/ | | | | | | Change-Id: Ib0dd8d34f0a5d68acb1efbc37680165e7d7933bd Reviewed-by: Friedemann Kleint <Friedemann.Kleint@theqtcompany.com> Reviewed-by: Gunnar Roth Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Android: Fix compilation for x86Eskil Abrahamsen Blomfeldt2015-02-271-1/+3
| | | | | | | | | | | | Bionic on x86 does not have an implementation of ffs(), for some reason. The declaration is available in strings.h, but causes a linker error. The toolchain has a builtin version though, which can be used instead. Change-Id: Iaf4c27542c1aabe88713842303251db44ae6ba86 Reviewed-by: Jani Heikkinen <jani.heikkinen@theqtcompany.com> Reviewed-by: Christian Stromme <christian.stromme@theqtcompany.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Update copyright headersJani Heikkinen2015-02-111-7/+7
| | | | | | | | | | | | | | | | | | Qt copyrights are now in The Qt Company, so we could update the source code headers accordingly. In the same go we should also fix the links to point to qt.io. Outdated header.LGPL removed (use header.LGPL21 instead) Old header.LGPL3 renamed to header.LGPL3-COMM to match actual licensing combination. New header.LGPL-COMM taken in the use file which were using old header.LGPL3 (src/plugins/platforms/android/extract.cpp) Added new header.LGPL3 containing Commercial + LGPLv3 + GPLv2 license combination Change-Id: I6f49b819a8a20cc4f88b794a8f6726d975e8ffbe Reviewed-by: Matti Paaso <matti.paaso@theqtcompany.com>
* Store the GCC version number in Q_CC_GNUThiago Macieira2014-11-051-1/+1
| | | | | | | | | | | The sequence of (__GNUC__ * 100 + __GNUC_MINOR__) was used in quite a few places. Simplify it to make the code more readable. This follows the change done for Clang, which was quite necessary since Apple's version of Clang has different build numbers. Change-Id: I886271a5a5f21ae59485ecf8d140527723345a46 Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@theqtcompany.com>
* Update license headers and add new license filesMatti Paaso2014-09-241-19/+11
| | | | | | | | | - Renamed LICENSE.LGPL to LICENSE.LGPLv21 - Added LICENSE.LGPLv3 - Removed LICENSE.GPL Change-Id: Iec3406e3eb3f133be549092015cefe33d259a3f2 Reviewed-by: Iikka Eklund <iikka.eklund@digia.com>
* Remove the last remnants of iWMMXt in QtThiago Macieira2014-08-051-15/+7
| | | | | | | | This code hasn't been tested for at least 4 years. It's not maintained and probably doesn't work. Change-Id: I4b9a5179e34111b400914f91caa6b741b69771bb Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@digia.com>
* Add a few missing Neon constructsThiago Macieira2014-08-051-7/+6
| | | | | | | | | | | The #undef in qcompilerdetection.h was missing. And apparently we can detect Neon since Windows Mobile 6 too. Change-Id: I38a5f71b2704a29a706183e39f43db3a78a729db Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@digia.com> Reviewed-by: Friedemann Kleint <Friedemann.Kleint@digia.com> Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Use an enum to check that the OS is saving the register stateThiago Macieira2014-07-311-1/+18
| | | | | | | | | | | | It's easier to read AVXState and AVX512State than 6 and 0xe6. Also add a note that where we should have checked whether the SSE state is being saved by the OS. However, we won't do it because it's just a waste of CPU cycles: any OS Qt 5 runs on will enable the proper state-saving. Change-Id: Id87b59fe1388a6cab983c9412341e36a86dd15c5 Reviewed-by: Olivier Goffart <ogoffart@woboq.com>
* MIPS: Support recognition of the DSP ASE at run-timeAdrian Perez de Castro2014-06-271-2/+141
| | | | | | | | | | | | | Add detection of MIPS DSPr2 at run-time in qsimd.cpp. This makes it possible to have generic Qt builds for MIPS that can enable the fast code paths for processors with the DSP ASE at run-time. Also, this makes it possible to manually disable them by setting the environment variable "QT_NO_CPU_FEATURE=dspr2". Last, but not least, functions requiring DSPr2 are not enabled when running in CPUs with version-1 DSP. Change-Id: Ia5a01d84119553c22ab83386c74a6cb8ba5fee53 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Use qregister(u)int in qsimd.cpp x86 codeThiago Macieira2014-02-011-3/+3
| | | | | | | | | | This way, the same codebase works for x86, x86-64 LP64 and x86-64 ILP32 (a.k.a. x32). Task-number: QTBUG-35463 Change-Id: Iffcecc6a4c03267fb64e287c2d6226d078d7d115 Reviewed-by: hjk <hjk121@nokiamail.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Remove last traces of QT_COMPILER_SUPPORTS_NEONTor Arne Vestbø2014-01-161-2/+2
| | | | | | | | | | | Fixes ARM build, as the NEON drawhelpers and image conversion functions were ifdef'ed out. Follow-up to 1b12c0608be2359baa2f96ae28b135a84abd388c. Change-Id: I0b5e89c8f445741432db2dfe1f8d971b971c8605 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Don't try to detect the CPUID instruction if we're compiling for PentiumThiago Macieira2013-08-271-1/+1
| | | | | | | | | | | | | | | | If we're compiling for Pentium or better CPUs, then we know that the CPUID instruction is present (I think it was introduced in late 486s, actually). So don't try to detect it. Simply assume it's there and then execute it. This means that if you compile Qt for Pentium (or higher) and run it on an i386 or i486, you'll get a SIGILL (or whatever your OS produces for an #UD processor exception). If the CPU detection code even got run -- SIGILL might happen for any other instructions found along the way. Change-Id: Iacd4a94a51363a609a61fc2bfd2e218fb290272d Reviewed-by: Olivier Goffart <ogoffart@woboq.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Use the GCC inline assembly when building for MinGWThiago Macieira2013-06-041-5/+5
| | | | | | | | | | | MinGW has a longstanding problem of providing the MSVC intrinsics that every Windows developer expects to be there. Other projects have run into those problems. So instead just use the GCC inline assembly. Change-Id: I5651f97f9a4dfbf98ebbf063f91f221eab80b224 Reviewed-by: Olivier Goffart <ogoffart@woboq.com>
* match #ifdefs relating to arm compilationOswald Buddenhagen2013-03-241-1/+1
| | | | | | | | use the same conditional around the #include as the actual code below uses, otherwise we risk mismatches. Change-Id: I8ca32c0178b1970928626a927948b06d4c6d31b9 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Doc: Fix module name formatSze Howe Koh2013-01-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Follow the conventions at http://qt-project.org/wiki/Spelling_Module_Names_in_Qt_Documentation QtCore -> Qt Core QtDBus -> Qt D-Bus QtDesigner -> Qt Designer QtGui -> Qt GUI QtImageFormats -> Qt Image Formats QtNetwork -> Qt Network QtPrintSupport -> Qt Print Support QtScript -> Qt Script QtSql -> Qt SQL QtSvg -> Qt SVG QtTest -> Qt Test QtWebKit -> Qt WebKit QtWidgets -> Qt Widgets QtXml -> Qt XML QtConcurrent -> Qt Concurrent (partial) QtQuick -> Qt Quick (partial) Also, distinguish between "module" and "library" Change-Id: Icb8aa695ae60b0e45920b0c8fce4dc763a12b0cd Reviewed-by: Jerome Pasion <jerome.pasion@digia.com>
* Update copyright year in Digia's license headersSergio Ahumada2013-01-181-1/+1
| | | | | Change-Id: Ic804938fc352291d011800d21e549c10acac66fb Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Change copyrights from Nokia to DigiaIikka Eklund2012-09-221-24/+24
| | | | | | | | Change copyrights and license headers from Nokia to Digia Change-Id: If1cc974286d29fd01ec6c19dd4719a67f4c3f00e Reviewed-by: Lars Knoll <lars.knoll@digia.com> Reviewed-by: Sergio Ahumada <sergio.ahumada@digia.com>
* Doc: Fix spelling errorsSergio Ahumada2012-08-171-1/+1
| | | | | Change-Id: Ibae8d10183f6b15a16b1499daa2df8802dbb014e Reviewed-by: Geir Vattekar <geir.vattekar@nokia.com>
* Disable CPUID checking with GCC 4.2 or olderThiago Macieira2012-08-151-0/+22
| | | | | | | | | | | | | | | | | | | | | | | This is not the first time that GCC 4.2 on Mac has produced bad code surrounding the CPUID instruction (see also commit 81d1f79a7f4b0f67d71). So declare it broken beyond repair and don't run the instruction at all. Instead, initialise the set of features found to be exactly that which we detected at compile-time. For that reason, we can also disable the runtime checking of the processor (minFeatures == detected features). At the time of this commit, only the draw helpers and one QImage helper make use of the runtime detection. Since the detection now switches to compile-time, QtGui will start carrying dead code for GCC 4.2 and earlier: it will never run the SSE2/SSSE3 code on 32-bit builds. (GCC 4.2 does not support AVX, so that code won't be built) Note: all Clang versions report that they are GCC 4.2, so we need to exclude it from the test; ICC reports the same version as the system's GCC. Change-Id: I43f168a9480a2479c6444eea175782b2eadc2ab2 Reviewed-by: Gunnar Sletta <gunnar.sletta@nokia.com>
* Make the CPU detection much more efficient in user codeThiago Macieira2012-07-021-40/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | First, check that the option in question hasn't been already enabled by the compiler, via compiler switches. If it has been, then we don't need to verify anything, and we can assume that it's safe to use such instructions. For example, on an x86-64 build, qCpuHasFeature(SSE2) is always a constant true. If the compile-time check fails, then we proceed to try and detect the processor features at runtime. But instead of insisting on a call to qDetectCPUFeatures, allow the code using the detection to read from a variable and simply test it for values. Only if the variable isn't initialised should it make a function call. The Q_ASSUME allows this code to be very efficient even with multiple uses of qCpuHasFeature. Change the uninitialised value from -1 to 0 so that simpler instructions can be used to check for non-initialisation. The qDetectCPUFeatures function is renamed to qDetectCpuFeatures to match the Qt coding style and also to catch uses this code that need to be adapted. Change-Id: I24ca5a6ad21075e2e249e1a4f8f5057b8f68ce7c Reviewed-by: Bradley T. Hughes <bradley.hughes@nokia.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Fix the confusion caused by the QT_ALWAYS_HAVE_xxx macrosThiago Macieira2012-05-311-1/+1
| | | | | | | | | | | | | | | | | | | | The QT_ALWAYS_HAVE_xxx macros are gone: they were hard to use and not defined properly. It indicated that the compiler was producing code that required that particular instruction set, so we could use it in our code unconditionally. Instead, let's use the GCC-style __SSE2__ and __ARM_NEON__. MSVC does not generate the __SSE2__ macro, so let's do it for the compiler. Also, define __AVX__ and the macros for the technologies leading to it when we manage to detect an /arch:AVX build (currently not possible, see note in the header). ICC and MSVC allow one to use the intrinsics anywhere, but for Qt all uses of the intrinsics are either in specially-built files, protected by runtime checks, or they are unconditional (qstring.cpp). So we only use the intrinsics when the compiler was instructed to generate code for that instruction set anyway. Change-Id: If8382f30422cee0e5831d051b003acf036824abf Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@nokia.com>
* Overhaul the qsimd_p.h: rename macros and update conditionalsThiago Macieira2012-05-311-2/+2
| | | | | | | | | | | | | | | The QT_HAVE_xxx macros are replaced with QT_COMPILER_SUPPORTS_xxx. They indicate that the compiler supports those intrinsics, but not necessarily that they can be used right now. ICC and MSVC allow one to use the intrinsics anywhere, but for Qt all uses of the intrinsics are either in specially-built files, protected by runtime checks, or they are unconditional (qstring.cpp). So we only use the intrinsics when the compiler was instructed to generate code for that instruction set anyway. Change-Id: Ie58eebbc0518ad1d5420a85174fd84153bb9abaa Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@nokia.com>
* Get rid of ambiguous overload for xgetbv.Jan-Arve Saether2012-05-211-2/+2
| | | | | | | | | | | | | | The patch that broke this was assuming the signature of xgetbv was _xgetbv(int). This lead to that there were no exact match for the function resolver, thus the ambiguity. Apparently, the signature of _xgetbv is _xgetbv(unsigned int). Changing the static xgetbv to uint makes the match exact, thus no more ambiguity. Change-Id: I8db95e00a9fef264d7a1f84d02bb929db84e6e5a Reviewed-by: Thiago Macieira <thiago.macieira@intel.com> Reviewed-by: Miikka Heikkinen <miikka.heikkinen@digia.com>
* Compile fix: Do not rely on __cpuidex() for msvc2008Jan-Arve Saether2012-05-191-4/+5
| | | | | | | | | | | | | | | Since its hard to detect if __cpuidex() is actually available at compile time, we'll add a function overload that will be chosen if the intrinsic __cpuidex() is not available. Note that the QtXgetbvHack that was used for _xgetbv did not really work (MS compiler will bail out because of ambiguous overloads if the intrinsic _xgetbv existed). Therefore, we apply the same workaround for _xgetbv. Change-Id: Iee3bf8bc6352ba0861b05d779f1f001d4eb013ff Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Fix MinGW-w64 compilationJonathan Liu2012-04-301-3/+3
| | | | | | | | | Use qintptr and quintptr for exchanging data with registers for cpuid as the size of long does not match the size of the register on Win64 which uses the LLP64 data model. Change-Id: I23b8c8e0977166f7e62795c16e9080e44d9f25f5 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* fix build with mingwKonstantin Ritt2012-04-271-17/+17
| | | | | | | since MinGW is GCC, invert the order and place the GCC constructs first Change-Id: I98113aa77e51f9e01c3641987e915bf475053a60 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Fix C++11 compilationOlivier Goffart2012-04-261-6/+6
| | | | | | | | Fix compilation with compilers that support user defined literal (such as GCC 4.7) Change-Id: I31cd3d2177688f963ab33cf68cd6060a5fb8640f Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Add detection code for AVX2, HLE, RTM and AES to qsimd.cppThiago Macieira2012-04-251-16/+35
| | | | | | | | | | | | | | | AES is currently not enabled, since we don't use it for anything. The code is here with the proper detection should we want to in the future. RTM and HLE (Transactional Memory Extensions) I'll use soon in the locking code. Also rename a few variables to make it easier to read later on. Change-Id: I800c66d7e1ba86ec037692928d94f53ea5d5868f Reviewed-by: Bradley T. Hughes <bradley.hughes@nokia.com> Reviewed-by: Samuel Rødal <samuel.rodal@nokia.com>
* Replace the x86 XGETBV instruction with its opcode bytesThiago Macieira2012-04-251-1/+1
| | | | | | | | | | | | | This is a new instruction, present on the SandyBridge architecture and later. Some older assemblers do not support it and produce: {standard input}:225:no such instruction: `xgetbv' The use of this instruction is protected by a CPUID check (function 1, ECX bit 27), so we only run it in processors that do support it. Change-Id: Ife7500c0deaab9539074835a4511e8c19602608e Reviewed-by: Bradley T. Hughes <bradley.hughes@nokia.com>
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