| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | SIMD: Change the way we declare constants for x86 | Thiago Macieira | 2018-07-09 | 1 | -86/+84 |
| | | | | | | | | | We need to use macros because MSVC is a crappy C compiler. Change-Id: Ieb48f7c0dd0e4e0fb35efffd153b8af62d34ebdf Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@qt.io> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com> | ||||
| * | SIMD: Refactor the constants to be actual bit values | Thiago Macieira | 2018-06-25 | 1 | -82/+79 |
| | | | | | | | | | | | | | ... instead of being the bit numbers. This allows us to test more than one feature at a time with qCpuHasFeature (see commit about the Haswell architecture features). The drawback is that we won't be able to handle more than 63 different CPU features, though we're likely quite far from it (x86 currently has only 36 features). Change-Id: Iff4151c519c144d580c4fffd153a0acbfd74c2c6 Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@qt.io> Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io> | ||||
| * | qsimd: add support for new x86 CPU features | Thiago Macieira | 2018-05-05 | 1 | -0/+227 |
| This adds detection for: VAES, GFNI, AVX512VBMI2, AVX512VNNI, AVX512BITALG, AVX512VPOPCNTDQ, AVX512_4NNIW, AVX512_4FMAPS. These features were found in the "Intel® Architecture Instruction Set Extensions and Future Features" manual, revision 30. This commit also adds support for RDPID (already in the main manual) and the Control-flow Enforcement Technology, which appears in a separate Intel paper. This new support was done by adding a new generator script so we don't have to maintain two tables in sync, one in qsimd.cpp with the feature names, and the other in qsimd_p.h. Since we now need a lot more bits, it's no longer worth keeping the two halves of the qt_cpu_features variable mostly similar to the main two CPUID results. This commit goes back to keeping things in order, like we used to prior to commit 6a8251a89b6a61258498f4af1ba7b3d5b7f7096c (Qt 5.6) At the time of this commit, GCC 8 has macros for AVX512VPOPCNTDQ, AVX512_4NNIW, AVX512_4FMAPS, AVX512VBMI2 and GFNI. Change-Id: I938b024e38bf4aac9154fffd14f7afae50faaa96 Reviewed-by: Edward Welbourne <edward.welbourne@qt.io> Reviewed-by: Lars Knoll <lars.knoll@qt.io> | |||||
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