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* Use SPDX license identifiersLucie Gérard2022-05-161-38/+2
| | | | | | | | | | | | | Replace the current license disclaimer in files by a SPDX-License-Identifier. Files that have to be modified by hand are modified. License files are organized under LICENSES directory. Task-number: QTBUG-67283 Change-Id: Id880c92784c40f3bbde861c0d93f58151c18b9f1 Reviewed-by: Qt CI Bot <qt_ci_bot@qt-project.org> Reviewed-by: Lars Knoll <lars.knoll@qt.io> Reviewed-by: Jörg Bornemann <joerg.bornemann@qt.io>
* util/x86simdgen: update with the copyright headerThiago Macieira2022-05-061-0/+1
| | | | | | | Matching update done in https://github.com/opendcdiag/opendcdiag/pull/78 Change-Id: I5ff8e16fcdcb4ffd9ab6fffd16ec02591cb5ed70 Reviewed-by: Jörg Bornemann <joerg.bornemann@qt.io>
* Fix generation of qsimd_x86 files to require no hand-editingEdward Welbourne2022-04-072-2/+8
| | | | | | | | | | | | | | | | | | Recent fixes to include the "We mean it" comment in the header also lead to that comment appearing in the generated .cpp file, which also lacked the "This is a generated file. DO NOT EDIT." comment. The generated header also lacked a blank line after the "We mean it" comment, so include that (and take it out, too, in the .cpp). The "Please see" line of the "DO NOT EDIT" comment also used the name of the generator script as seen from the Makefile that drives the regeneration; replace this with the README.md file that actually explains how to regenerate the files in corelib/global/. This amends commit 71af0d7059d47a199e1d26de6573d6a5038caa30 and commit b852584556bec3750bad7fac984b6fc5af4c870f Change-Id: I4b5b4dbef5954819632bb625d1914a9ec46e15d9 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Re-add missing 'we mean it' headerKai Köhne2022-03-071-0/+10
| | | | | | | | | This got lost in commit b852584556bec3750bad7fac984b6fc5af4c870f . Also augment util/x86simdgen/header so that the header is automatically included when qsimd_x86_p.h is re-generated. Change-Id: I3e59b983f78b8c1aced3757e1aa5dceb6d653d97 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* qsimd_p.h: let the generator script generate the ARCH target stringsThiago Macieira2022-02-191-7/+30
| | | | | | | | | | | | | | __attribute__((target("arch=xxxx"))) does not work because the compilers (GCC at least) don't test the CPU features that they are targeting, so we keep getting "inline failed" compiler errors. GCC bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90129 Upstream patch: https://github.com/opendcdiag/opendcdiag/pull/59 Change-Id: I6fcda969a9e9427198bffffd16cea09fda4406d2 Reviewed-by: Qt CI Bot <qt_ci_bot@qt-project.org> Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
* qsimd: update the generator script from OpenDCDiagThiago Macieira2022-02-189-314/+615
| | | | | | | | | | | | | | | | I'd been making changes to that and improving it for the past 2 years without bringing it back into Qt. The list of features is mostly the same, except: - removed TSX features - removed features specific to Xeon Phi processors - added CET and AVX512FP16 features - added the bit for hybrid CPU detection See matching update at https://github.com/opendcdiag/opendcdiag/pull/49 Change-Id: I6fcda969a9e9427198bffffd16ce860b5a38aece Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
* Move qsimd* from corelib/tools to corelib/globalLars Knoll2020-03-261-5/+83
| | | | | | | | | | | It's not used in tools at all and fits a lot better in global. Also fix the qsimd_x86* files to have a proper copyright header. Change-Id: Id3d8e7cfcd7769a1ca9f3d8cf6d357a31a99ba40 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com> Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* SIMD: Change the way we declare constants for x86Thiago Macieira2018-07-091-15/+11
| | | | | | | | We need to use macros because MSVC is a crappy C compiler. Change-Id: Ieb48f7c0dd0e4e0fb35efffd153b8af62d34ebdf Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@qt.io> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* SIMD: Refactor the constants to be actual bit valuesThiago Macieira2018-06-251-12/+23
| | | | | | | | | | | | ... instead of being the bit numbers. This allows us to test more than one feature at a time with qCpuHasFeature (see commit about the Haswell architecture features). The drawback is that we won't be able to handle more than 63 different CPU features, though we're likely quite far from it (x86 currently has only 36 features). Change-Id: Iff4151c519c144d580c4fffd153a0acbfd74c2c6 Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@qt.io> Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
* qsimd: add support for new x86 CPU featuresThiago Macieira2018-05-052-0/+229
This adds detection for: VAES, GFNI, AVX512VBMI2, AVX512VNNI, AVX512BITALG, AVX512VPOPCNTDQ, AVX512_4NNIW, AVX512_4FMAPS. These features were found in the "Intel® Architecture Instruction Set Extensions and Future Features" manual, revision 30. This commit also adds support for RDPID (already in the main manual) and the Control-flow Enforcement Technology, which appears in a separate Intel paper. This new support was done by adding a new generator script so we don't have to maintain two tables in sync, one in qsimd.cpp with the feature names, and the other in qsimd_p.h. Since we now need a lot more bits, it's no longer worth keeping the two halves of the qt_cpu_features variable mostly similar to the main two CPUID results. This commit goes back to keeping things in order, like we used to prior to commit 6a8251a89b6a61258498f4af1ba7b3d5b7f7096c (Qt 5.6) At the time of this commit, GCC 8 has macros for AVX512VPOPCNTDQ, AVX512_4NNIW, AVX512_4FMAPS, AVX512VBMI2 and GFNI. Change-Id: I938b024e38bf4aac9154fffd14f7afae50faaa96 Reviewed-by: Edward Welbourne <edward.welbourne@qt.io> Reviewed-by: Lars Knoll <lars.knoll@qt.io>
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