From 29d3938aa56663f09666a0ac58b33e70e00abff2 Mon Sep 17 00:00:00 2001 From: Thiago Macieira Date: Fri, 30 Sep 2022 09:49:12 -0700 Subject: qsimd_p.h: remove BMI1 feature from the ARCH_HASWELL list AMD introduced BMI1 to one of their processor generations before AVX2 and BMI2. Complements a98cf15ed1b57aee695de01b04a974637b2cd44a. Fixes: QTBUG-107072 Pick-to: 6.4 Change-Id: I810d70e579eb4e2c8e45fffd1719b15d80d88c10 Reviewed-by: Allan Sandfeld Jensen --- src/corelib/global/qsimd_p.h | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/corelib/global/qsimd_p.h b/src/corelib/global/qsimd_p.h index a5a196a4d2..344aeefc71 100644 --- a/src/corelib/global/qsimd_p.h +++ b/src/corelib/global/qsimd_p.h @@ -220,14 +220,15 @@ asm( // The Intel Core 4th generation was codenamed "Haswell" and introduced AVX2, // BMI1, BMI2, FMA, LZCNT, MOVBE, which makes it a good divider for a // sub-target for us. The first AMD processor with AVX2 support (Zen) has the -// same features. This feature set was chosen as the version 3 of the x86-64 -// ISA (x86-64-v3) and is supported by GCC and Clang. +// same features, but had already introduced BMI1 in the previous generation. +// This feature set was chosen as the version 3 of the x86-64 ISA (x86-64-v3) +// and is supported by GCC and Clang. // // macOS's fat binaries support the "x86_64h" sub-architecture and the GNU libc // ELF loader also supports a "haswell/" subdir (e.g., /usr/lib/haswell). -# define ARCH_HASWELL_MACROS (__AVX2__ + __BMI__ + __BMI2__ + __FMA__ + __LZCNT__) +# define ARCH_HASWELL_MACROS (__AVX2__ + __BMI2__ + __FMA__ + __LZCNT__) # if ARCH_HASWELL_MACROS != 0 -# if ARCH_HASWELL_MACROS != 5 +# if ARCH_HASWELL_MACROS != 4 # error "Please enable all x86-64-v3 extensions; you probably want to use -march=haswell or -march=x86-64-v3 instead of -mavx2" # endif static_assert(ARCH_HASWELL_MACROS, "Undeclared identifiers indicate which features are missing."); -- cgit v1.2.3