From 7ec14ae0b267780d6bfa5c7453c906caeee3bc00 Mon Sep 17 00:00:00 2001
From: Pino Toscano <toscano.pino@tiscali.it>
Date: Sat, 27 Dec 2014 17:54:47 +0100
Subject: Complete MIPS atomic support on pre-MIPS32 architectures

Extend the support for pre-MIPS32 architectures (done mostly in
60b6b28c213a420ee40e254ff1823876098e0a04) also to orderedMemoryFence.

Change-Id: I50b9091c16166b8434a07988053c1f901d528237
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
---
 src/corelib/arch/qatomic_mips.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

(limited to 'src/corelib/arch')

diff --git a/src/corelib/arch/qatomic_mips.h b/src/corelib/arch/qatomic_mips.h
index b8a9665f86..b99c70f0c8 100644
--- a/src/corelib/arch/qatomic_mips.h
+++ b/src/corelib/arch/qatomic_mips.h
@@ -120,7 +120,10 @@ void QBasicAtomicOps<size>::releaseMemoryFence(const T &) Q_DECL_NOTHROW
 template <int size> template <typename T> inline
 void QBasicAtomicOps<size>::orderedMemoryFence(const T &) Q_DECL_NOTHROW
 {
-    asm volatile ("sync 0" ::: "memory");
+    asm volatile (".set push\n"
+                  ".set mips32\n"
+                  "sync 0\n"
+                  ".set pop\n" ::: "memory");
 }
 
 template<> template<typename T> inline
-- 
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