From 99fb1bea49c4de5cf3143af59f8c96a92980e58f Mon Sep 17 00:00:00 2001
From: Thiago Macieira <thiago@kde.org>
Date: Sun, 31 Jul 2011 19:09:20 -0300
Subject: Port the MIPS atomics to the new QBasicAtomicXXX architecture

The LL/SC instructions are only present on MIPS II and up, so don't
pretend to support MIPS I. The previous implementation emitted the
instructions by telling the assembler to change instruction sets. Now,
the user must pass an -march= option to GCC telling it which
architecture or processor is being targetted.

On MIPS64, the 64-bit implementation allows supporting for long long
too.

Change-Id: I6dae6f8f61e563aba6a663227d91c5ddf554aa6a
Reviewed-by: Bradley T. Hughes <bradley.hughes@nokia.com>
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
---
 src/corelib/thread/qbasicatomic.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/corelib/thread')

diff --git a/src/corelib/thread/qbasicatomic.h b/src/corelib/thread/qbasicatomic.h
index 198eed435d..89192a5e91 100644
--- a/src/corelib/thread/qbasicatomic.h
+++ b/src/corelib/thread/qbasicatomic.h
@@ -52,6 +52,8 @@
 #  include <QtCore/qatomic_arm.h>
 #elif defined(__i386) || defined(__i386__)
 #  include <QtCore/qatomic_i386.h>
+#elif defined(__mips) || defined(__mips__)
+#  include "QtCore/qatomic_mips.h"
 #elif defined(__x86_64) || defined(__x86_64__) || defined(__amd64)
 #  include <QtCore/qatomic_x86_64.h>
 #else
-- 
cgit v1.2.3