From de40f24706d0f3c4cc13900380aacc90d6879356 Mon Sep 17 00:00:00 2001 From: Thiago Macieira Date: Sun, 15 Apr 2018 14:36:53 -0700 Subject: Fix the enabling of AES with ICC and MSVC on some low-end processors MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GCC and Clang assume that all Sandybridge (2nd generation) and newer Intel Core™ processors have AES, which I used as a source of information for this code. However, there are a few low-end parts that miss this feature, like Intel Core™ i3-2350M, i3-3130M, i3-4000M. [1] https://ark.intel.com/products/series/75025/4th-Generation-Intel-Core-i3-Processors Task-number: QTBUG-67705 Change-Id: If90a92b041d3442fa0a4fffd1525b9afbcb6e524 Reviewed-by: Oswald Buddenhagen Reviewed-by: Thiago Macieira --- src/corelib/tools/qsimd_p.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'src/corelib/tools/qsimd_p.h') diff --git a/src/corelib/tools/qsimd_p.h b/src/corelib/tools/qsimd_p.h index eb56b31348..18684caefb 100644 --- a/src/corelib/tools/qsimd_p.h +++ b/src/corelib/tools/qsimd_p.h @@ -219,9 +219,8 @@ // AVX intrinsics # if defined(__AVX__) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS) && (defined(Q_CC_INTEL) || defined(Q_CC_MSVC)) // AES, PCLMULQDQ instructions: -// All processors that support AVX support AES, PCLMULQDQ -// (but neither MSVC nor the Intel compiler define these macros) -# define __AES__ 1 +// All processors that support AVX support PCLMULQDQ +// (but neither MSVC nor the Intel compiler define this macro) # define __PCLMUL__ 1 # endif -- cgit v1.2.3