diff options
| author | Julien Brianceau <jbriance@cisco.com> | 2015-04-13 17:00:34 +0200 |
|---|---|---|
| committer | Julien Brianceau <jbriance@cisco.com> | 2015-04-14 08:28:47 +0000 |
| commit | 181824f2497b3c874acce0f4a54a5580ee64ea90 (patch) | |
| tree | af8bc61eda451d829df0fbbdad89031c43fde456 | |
| parent | 47f6d256edf76a8a201057236226b507bcc1aa89 (diff) | |
V4 JIT: fix typo in Binop::int32Binop
Change-Id: I68f073ab512b482c9b3b1ad7860f4c759245298e
Reviewed-by: Simon Hausmann <simon.hausmann@theqtcompany.com>
| -rw-r--r-- | src/qml/jit/qv4binop.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/qml/jit/qv4binop.cpp b/src/qml/jit/qv4binop.cpp index a2d4815cf2..7d6f3977a9 100644 --- a/src/qml/jit/qv4binop.cpp +++ b/src/qml/jit/qv4binop.cpp @@ -430,13 +430,13 @@ bool Binop::int32Binop(IR::Expr *leftSource, IR::Expr *rightSource, IR::Expr *ta as->lshift32(l, Assembler::ScratchRegister, targetReg); break; - case IR::OpLShift: + case IR::OpRShift: as->move(r, Assembler::ScratchRegister); as->and32(Assembler::TrustedImm32(0x1f), Assembler::ScratchRegister); as->rshift32(l, Assembler::ScratchRegister, targetReg); break; - case IR::OpLShift: + case IR::OpURShift: as->move(r, Assembler::ScratchRegister); as->and32(Assembler::TrustedImm32(0x1f), Assembler::ScratchRegister); as->storeUInt32(targetReg, target); // IMPORTANT: do NOT do a break here! The stored type of an urshift is different from the other binary operations! |