diff options
| author | Erik Verbruggen <erik.verbruggen@digia.com> | 2014-04-10 13:59:32 +0200 |
|---|---|---|
| committer | The Qt Project <gerrit-noreply@qt-project.org> | 2014-04-17 07:09:40 +0200 |
| commit | 6572d4e50d73ac60a8974d07de74c27a7f99ebef (patch) | |
| tree | 9a1ac37ad643b2fd1082f1e97bdffcf67b450b57 | |
| parent | fc634cb4a2daed40690f0530dc06ff850f3b73ab (diff) | |
V4: fix register usage on ARM.
JSC was using r3 as the address scratch register, which collides with
the 4th parameter in a function call. This sometimes shows up when
generateFunctionCall needs to do a calulated jump.
Also fix the usage of r11, which seems to be the fp on some platforms.
Change-Id: Ib2ea64b9342e5aa631db6a7641747f899b2fbd89
Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
| -rw-r--r-- | src/3rdparty/masm/assembler/MacroAssemblerARMv7.h | 2 | ||||
| -rw-r--r-- | src/qml/jit/qv4assembler_p.h | 6 | ||||
| -rw-r--r-- | src/qml/jit/qv4isel_masm.cpp | 6 |
3 files changed, 7 insertions, 7 deletions
diff --git a/src/3rdparty/masm/assembler/MacroAssemblerARMv7.h b/src/3rdparty/masm/assembler/MacroAssemblerARMv7.h index 9a8dc1f358..f492cc8c94 100644 --- a/src/3rdparty/masm/assembler/MacroAssemblerARMv7.h +++ b/src/3rdparty/masm/assembler/MacroAssemblerARMv7.h @@ -39,7 +39,7 @@ class MacroAssemblerARMv7 : public AbstractMacroAssembler<ARMv7Assembler> { // - dTR is likely used more than aTR, and we'll get better instruction // encoding if it's in the low 8 registers. static const RegisterID dataTempRegister = ARMRegisters::ip; - static const RegisterID addressTempRegister = ARMRegisters::r3; + static const RegisterID addressTempRegister = ARMRegisters::r10; static const ARMRegisters::FPDoubleRegisterID fpTempRegister = ARMRegisters::d7; inline ARMRegisters::FPSingleRegisterID fpTempRegisterAsSingle() { return ARMRegisters::asSingle(fpTempRegister); } diff --git a/src/qml/jit/qv4assembler_p.h b/src/qml/jit/qv4assembler_p.h index 085da34ed3..32f9d7e867 100644 --- a/src/qml/jit/qv4assembler_p.h +++ b/src/qml/jit/qv4assembler_p.h @@ -219,12 +219,12 @@ public: #define ARGUMENTS_IN_REGISTERS #undef HAVE_ALU_OPS_WITH_MEM_OPERAND - static const RegisterID StackFrameRegister = JSC::ARMRegisters::r4; - static const RegisterID StackPointerRegister = JSC::ARMRegisters::sp; + static const RegisterID StackPointerRegister = JSC::ARMRegisters::sp; // r13 + static const RegisterID StackFrameRegister = JSC::ARMRegisters::fp; // r11 static const RegisterID LocalsRegister = JSC::ARMRegisters::r7; + static const RegisterID ScratchRegister = JSC::ARMRegisters::r6; static const RegisterID ContextRegister = JSC::ARMRegisters::r5; static const RegisterID ReturnValueRegister = JSC::ARMRegisters::r0; - static const RegisterID ScratchRegister = JSC::ARMRegisters::r6; static const FPRegisterID FPGpr0 = JSC::ARMRegisters::d0; static const FPRegisterID FPGpr1 = JSC::ARMRegisters::d1; diff --git a/src/qml/jit/qv4isel_masm.cpp b/src/qml/jit/qv4isel_masm.cpp index 5cda52832e..051677d84a 100644 --- a/src/qml/jit/qv4isel_masm.cpp +++ b/src/qml/jit/qv4isel_masm.cpp @@ -252,10 +252,10 @@ static QVector<int> getIntRegisters() static const QVector<int> intRegisters = QVector<int>() << JSC::ARMRegisters::r1 << JSC::ARMRegisters::r2 + << JSC::ARMRegisters::r3 + << JSC::ARMRegisters::r4 << JSC::ARMRegisters::r8 - << JSC::ARMRegisters::r9 - << JSC::ARMRegisters::r10 - << JSC::ARMRegisters::r11; + << JSC::ARMRegisters::r9; return intRegisters; } |