diff options
| author | Simon Hausmann <simon.hausmann@qt.io> | 2017-05-03 16:58:44 +0200 |
|---|---|---|
| committer | Simon Hausmann <simon.hausmann@qt.io> | 2017-05-03 15:49:31 +0000 |
| commit | 0da6de65468d3b8cc1ca7ee0af10f254ae3d4dd6 (patch) | |
| tree | 0e74decd09bc54fb2f6d8653cb6b5b9c10d4090e | |
| parent | 30dbe57521c9b1f4cac74db8f5f15a3c466c20d0 (diff) | |
Fix ARM64 code generation
When generating instructions for pointer arithmetic, do use the 64-bit
registers, otherwise for example when loading pointers we'll end up only
loading the lower 32 bits.
Task-number: QTBUG-60441
Change-Id: I2c7c82964029e383afcadabc078842690d2d637a
Reviewed-by: Robin Burchell <robin.burchell@crimson.no>
| -rw-r--r-- | src/3rdparty/masm/assembler/MacroAssemblerARM64.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/3rdparty/masm/assembler/MacroAssemblerARM64.h b/src/3rdparty/masm/assembler/MacroAssemblerARM64.h index 11f1672e15..d5f4acb3ca 100644 --- a/src/3rdparty/masm/assembler/MacroAssemblerARM64.h +++ b/src/3rdparty/masm/assembler/MacroAssemblerARM64.h @@ -214,27 +214,27 @@ public: #if defined(V4_BOOTSTRAP) void loadPtr(ImplicitAddress address, RegisterID dest) { - load32(address, dest); + load64(address, dest); } void subPtr(TrustedImm32 imm, RegisterID dest) { - sub32(imm, dest); + sub64(imm, dest); } void addPtr(TrustedImm32 imm, RegisterID dest) { - add32(imm, dest); + add64(imm, dest); } void addPtr(TrustedImm32 imm, RegisterID src, RegisterID dest) { - add32(imm, src, dest); + add64(imm, src, dest); } void storePtr(RegisterID src, ImplicitAddress address) { - store32(src, address); + store64(src, address); } #endif |