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authorErik Verbruggen <erik.verbruggen@digia.com>2016-01-14 15:39:17 +0100
committerErik Verbruggen <erik.verbruggen@theqtcompany.com>2016-01-19 11:19:38 +0000
commitf8bcf723ce920981705c6913fffb1f4d3de6793d (patch)
treed0bced1e1e422c32d3f148c1ded7846063fb25f6 /src/3rdparty/masm/assembler/MacroAssembler.h
parent9876f7ac8bd3679a9ed0e617aaadad032403a88f (diff)
V4: add Aarch64/ARM64 support.
This uses the JavaScriptCore assembler rev. 195098. It is tested on iOS (for which it is disabled, as it only allows marking pages as executable when running from Xcode). Testing on Linux will be done when hardware arrives. Change-Id: I650e15fec03c27d4b326a2d70863a89b85cfc5c3 Reviewed-by: Simon Hausmann <simon.hausmann@theqtcompany.com>
Diffstat (limited to 'src/3rdparty/masm/assembler/MacroAssembler.h')
-rw-r--r--src/3rdparty/masm/assembler/MacroAssembler.h12
1 files changed, 8 insertions, 4 deletions
diff --git a/src/3rdparty/masm/assembler/MacroAssembler.h b/src/3rdparty/masm/assembler/MacroAssembler.h
index 0c95bc7ca1..e122e2f3ae 100644
--- a/src/3rdparty/masm/assembler/MacroAssembler.h
+++ b/src/3rdparty/masm/assembler/MacroAssembler.h
@@ -34,6 +34,10 @@
#include "MacroAssemblerARMv7.h"
namespace JSC { typedef MacroAssemblerARMv7 MacroAssemblerBase; };
+#elif CPU(ARM64)
+#include "MacroAssemblerARM64.h"
+namespace JSC { typedef MacroAssemblerARM64 MacroAssemblerBase; };
+
#elif CPU(ARM_TRADITIONAL)
#include "MacroAssemblerARM.h"
namespace JSC { typedef MacroAssemblerARM MacroAssemblerBase; };
@@ -183,7 +187,7 @@ public:
storePtr(imm, addressForPoke(index));
}
-#if CPU(X86_64)
+#if CPU(X86_64) || CPU(ARM64)
void peek64(RegisterID dest, int index = 0)
{
load64(Address(stackPointerRegister, (index * sizeof(void*))), dest);
@@ -253,7 +257,7 @@ public:
branchTestPtr(cond, reg).linkTo(target, this);
}
-#if !CPU(ARM_THUMB2)
+#if !CPU(ARM_THUMB2) && !CPU(ARM64)
PatchableJump patchableBranchPtr(RelationalCondition cond, Address left, TrustedImmPtr right = TrustedImmPtr(0))
{
return PatchableJump(branchPtr(cond, left, right));
@@ -273,7 +277,7 @@ public:
{
return PatchableJump(branchTest32(cond, reg, mask));
}
-#endif // !CPU(ARM_THUMB2)
+#endif // !CPU(ARM_THUMB2) && !CPU(ARM64)
#if !CPU(ARM)
PatchableJump patchableBranch32(RelationalCondition cond, RegisterID reg, TrustedImm32 imm)
@@ -325,7 +329,7 @@ public:
// Ptr methods
// On 32-bit platforms (i.e. x86), these methods directly map onto their 32-bit equivalents.
// FIXME: should this use a test for 32-bitness instead of this specific exception?
-#if !CPU(X86_64)
+#if !CPU(X86_64) && !CPU(ARM64)
void addPtr(Address src, RegisterID dest)
{
add32(src, dest);