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author | Laszlo Agocs <laszlo.agocs@qt.io> | 2019-03-21 20:42:38 +0100 |
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committer | Laszlo Agocs <laszlo.agocs@qt.io> | 2019-03-21 20:42:47 +0100 |
commit | 6767114285db9d0e16dc278d08f231e8561546b4 (patch) | |
tree | 0945902a2242fd7ec0a1f7fd3e6acbb769e723bd /src/3rdparty/masm/assembler/MacroAssemblerARM64.h | |
parent | ee076afedccbe1d37306a7972051f84eb036d655 (diff) | |
parent | c32b109e9dea44c6775c2dbf8f164870c1dc8971 (diff) |
Merge remote-tracking branch 'origin/dev' into wip/scenegraphng
Change-Id: Ib5662d80d5b2f58cf4634c54c054545ba9df807e
Diffstat (limited to 'src/3rdparty/masm/assembler/MacroAssemblerARM64.h')
-rw-r--r-- | src/3rdparty/masm/assembler/MacroAssemblerARM64.h | 235 |
1 files changed, 149 insertions, 86 deletions
diff --git a/src/3rdparty/masm/assembler/MacroAssemblerARM64.h b/src/3rdparty/masm/assembler/MacroAssemblerARM64.h index d5f4acb3ca..e5a704292d 100644 --- a/src/3rdparty/masm/assembler/MacroAssemblerARM64.h +++ b/src/3rdparty/masm/assembler/MacroAssemblerARM64.h @@ -718,15 +718,20 @@ public: void or64(TrustedImm64 imm, RegisterID dest) { + or64(imm, dest, dest); + } + + void or64(TrustedImm64 imm, RegisterID src, RegisterID dest) + { LogicalImmediate logicalImm = LogicalImmediate::create64(static_cast<intptr_t>(static_cast<int64_t>(imm.m_value))); if (logicalImm.isValid()) { - m_assembler.orr<64>(dest, dest, logicalImm); + m_assembler.orr<64>(dest, src, logicalImm); return; } move(imm, getCachedDataTempRegisterIDAndInvalidate()); - m_assembler.orr<64>(dest, dest, dataTempRegister); + m_assembler.orr<64>(dest, src, dataTempRegister); } void rotateRight64(TrustedImm32 imm, RegisterID srcDst) @@ -1121,6 +1126,11 @@ public: m_assembler.ldrh(dest, address.base, memoryTempRegister); } + void load16Unaligned(ImplicitAddress address, RegisterID dest) + { + load16(address, dest); + } + void load16Unaligned(BaseIndex address, RegisterID dest) { load16(address, dest); @@ -1278,6 +1288,16 @@ public: return label; } + void storePair64(RegisterID src1, RegisterID src2, RegisterID dest) + { + storePair64(src1, src2, dest, TrustedImm32(0)); + } + + void storePair64(RegisterID src1, RegisterID src2, RegisterID dest, TrustedImm32 offset) + { + m_assembler.stp<64>(src1, src2, dest, offset.m_value); + } + void store32(RegisterID src, ImplicitAddress address) { if (tryStoreWithOffset<32>(src, address.base, address.offset)) @@ -1415,6 +1435,14 @@ public: store8(dataTempRegister, address); } + void getEffectiveAddress(BaseIndex address, RegisterID dest) + { + m_assembler.add<64>(dest, address.base, address.index, ARM64Assembler::LSL, address.scale); + if (address.offset) + add64(TrustedImm32(address.offset), dest); + } + + // Floating-point operations: static bool supportsFloatingPoint() { return true; } @@ -3096,40 +3124,22 @@ private: } template<int datasize> - ALWAYS_INLINE void loadUnsignedImmediate(RegisterID rt, RegisterID rn, unsigned pimm) - { - m_assembler.ldr<datasize>(rt, rn, pimm); - } + void loadUnsignedImmediate(RegisterID rt, RegisterID rn, unsigned pimm); template<int datasize> - ALWAYS_INLINE void loadUnscaledImmediate(RegisterID rt, RegisterID rn, int simm) - { - m_assembler.ldur<datasize>(rt, rn, simm); - } + void loadUnscaledImmediate(RegisterID rt, RegisterID rn, int simm); template<int datasize> - ALWAYS_INLINE void loadSignedAddressedByUnsignedImmediate(RegisterID rt, RegisterID rn, unsigned pimm) - { - loadUnsignedImmediate<datasize>(rt, rn, pimm); - } + void loadSignedAddressedByUnsignedImmediate(RegisterID rt, RegisterID rn, unsigned pimm); template<int datasize> - ALWAYS_INLINE void loadSignedAddressedByUnscaledImmediate(RegisterID rt, RegisterID rn, int simm) - { - loadUnscaledImmediate<datasize>(rt, rn, simm); - } + void loadSignedAddressedByUnscaledImmediate(RegisterID rt, RegisterID rn, int simm); template<int datasize> - ALWAYS_INLINE void storeUnsignedImmediate(RegisterID rt, RegisterID rn, unsigned pimm) - { - m_assembler.str<datasize>(rt, rn, pimm); - } + void storeUnsignedImmediate(RegisterID rt, RegisterID rn, unsigned pimm); template<int datasize> - ALWAYS_INLINE void storeUnscaledImmediate(RegisterID rt, RegisterID rn, int simm) - { - m_assembler.stur<datasize>(rt, rn, simm); - } + void storeUnscaledImmediate(RegisterID rt, RegisterID rn, int simm); void moveWithFixedWidth(TrustedImm32 imm, RegisterID dest) { @@ -3294,74 +3304,19 @@ private: } template<int datasize> - ALWAYS_INLINE bool tryLoadWithOffset(RegisterID rt, RegisterID rn, int32_t offset) - { - if (ARM64Assembler::canEncodeSImmOffset(offset)) { - loadUnscaledImmediate<datasize>(rt, rn, offset); - return true; - } - if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) { - loadUnsignedImmediate<datasize>(rt, rn, static_cast<unsigned>(offset)); - return true; - } - return false; - } + bool tryLoadWithOffset(RegisterID rt, RegisterID rn, int32_t offset); template<int datasize> - ALWAYS_INLINE bool tryLoadSignedWithOffset(RegisterID rt, RegisterID rn, int32_t offset) - { - if (ARM64Assembler::canEncodeSImmOffset(offset)) { - loadSignedAddressedByUnscaledImmediate<datasize>(rt, rn, offset); - return true; - } - if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) { - loadSignedAddressedByUnsignedImmediate<datasize>(rt, rn, static_cast<unsigned>(offset)); - return true; - } - return false; - } + bool tryLoadSignedWithOffset(RegisterID rt, RegisterID rn, int32_t offset); template<int datasize> - ALWAYS_INLINE bool tryLoadWithOffset(FPRegisterID rt, RegisterID rn, int32_t offset) - { - if (ARM64Assembler::canEncodeSImmOffset(offset)) { - m_assembler.ldur<datasize>(rt, rn, offset); - return true; - } - if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) { - m_assembler.ldr<datasize>(rt, rn, static_cast<unsigned>(offset)); - return true; - } - return false; - } + bool tryLoadWithOffset(FPRegisterID rt, RegisterID rn, int32_t offset); template<int datasize> - ALWAYS_INLINE bool tryStoreWithOffset(RegisterID rt, RegisterID rn, int32_t offset) - { - if (ARM64Assembler::canEncodeSImmOffset(offset)) { - storeUnscaledImmediate<datasize>(rt, rn, offset); - return true; - } - if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) { - storeUnsignedImmediate<datasize>(rt, rn, static_cast<unsigned>(offset)); - return true; - } - return false; - } + bool tryStoreWithOffset(RegisterID rt, RegisterID rn, int32_t offset); template<int datasize> - ALWAYS_INLINE bool tryStoreWithOffset(FPRegisterID rt, RegisterID rn, int32_t offset) - { - if (ARM64Assembler::canEncodeSImmOffset(offset)) { - m_assembler.stur<datasize>(rt, rn, offset); - return true; - } - if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) { - m_assembler.str<datasize>(rt, rn, static_cast<unsigned>(offset)); - return true; - } - return false; - } + bool tryStoreWithOffset(FPRegisterID rt, RegisterID rn, int32_t offset); Jump jumpAfterFloatingPointCompare(DoubleCondition cond) { @@ -3408,6 +3363,43 @@ private: bool m_allowScratchRegister = true; }; +template<int datasize> +ALWAYS_INLINE void MacroAssemblerARM64::loadUnsignedImmediate(RegisterID rt, RegisterID rn, unsigned pimm) +{ + m_assembler.ldr<datasize>(rt, rn, pimm); +} + +template<int datasize> +ALWAYS_INLINE void MacroAssemblerARM64::loadUnscaledImmediate(RegisterID rt, RegisterID rn, int simm) +{ + m_assembler.ldur<datasize>(rt, rn, simm); +} + +template<int datasize> +ALWAYS_INLINE void MacroAssemblerARM64::loadSignedAddressedByUnsignedImmediate(RegisterID rt, RegisterID rn, unsigned pimm) +{ + loadUnsignedImmediate<datasize>(rt, rn, pimm); +} + +template<int datasize> +ALWAYS_INLINE void MacroAssemblerARM64::loadSignedAddressedByUnscaledImmediate(RegisterID rt, RegisterID rn, int simm) +{ + loadUnscaledImmediate<datasize>(rt, rn, simm); +} + +template<int datasize> +ALWAYS_INLINE void MacroAssemblerARM64::storeUnsignedImmediate(RegisterID rt, RegisterID rn, unsigned pimm) +{ + m_assembler.str<datasize>(rt, rn, pimm); +} + +template<int datasize> +ALWAYS_INLINE void MacroAssemblerARM64::storeUnscaledImmediate(RegisterID rt, RegisterID rn, int simm) +{ + m_assembler.stur<datasize>(rt, rn, simm); +} + + // Extend the {load,store}{Unsigned,Unscaled}Immediate templated general register methods to cover all load/store sizes template<> ALWAYS_INLINE void MacroAssemblerARM64::loadUnsignedImmediate<8>(RegisterID rt, RegisterID rn, unsigned pimm) @@ -3481,6 +3473,77 @@ ALWAYS_INLINE void MacroAssemblerARM64::storeUnscaledImmediate<16>(RegisterID rt m_assembler.sturh(rt, rn, simm); } +template<int datasize> +ALWAYS_INLINE bool MacroAssemblerARM64::tryLoadSignedWithOffset(RegisterID rt, RegisterID rn, int32_t offset) +{ + if (ARM64Assembler::canEncodeSImmOffset(offset)) { + loadSignedAddressedByUnscaledImmediate<datasize>(rt, rn, offset); + return true; + } + if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) { + loadSignedAddressedByUnsignedImmediate<datasize>(rt, rn, static_cast<unsigned>(offset)); + return true; + } + return false; +} + +template<int datasize> +ALWAYS_INLINE bool MacroAssemblerARM64::tryStoreWithOffset(RegisterID rt, RegisterID rn, int32_t offset) +{ + if (ARM64Assembler::canEncodeSImmOffset(offset)) { + storeUnscaledImmediate<datasize>(rt, rn, offset); + return true; + } + if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) { + storeUnsignedImmediate<datasize>(rt, rn, static_cast<unsigned>(offset)); + return true; + } + return false; +} + +template<int datasize> +ALWAYS_INLINE bool MacroAssemblerARM64::tryStoreWithOffset(FPRegisterID rt, RegisterID rn, int32_t offset) +{ + if (ARM64Assembler::canEncodeSImmOffset(offset)) { + m_assembler.stur<datasize>(rt, rn, offset); + return true; + } + if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) { + m_assembler.str<datasize>(rt, rn, static_cast<unsigned>(offset)); + return true; + } + return false; +} + + +template<int datasize> +ALWAYS_INLINE bool MacroAssemblerARM64::tryLoadWithOffset(RegisterID rt, RegisterID rn, int32_t offset) +{ + if (ARM64Assembler::canEncodeSImmOffset(offset)) { + loadUnscaledImmediate<datasize>(rt, rn, offset); + return true; + } + if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) { + loadUnsignedImmediate<datasize>(rt, rn, static_cast<unsigned>(offset)); + return true; + } + return false; +} + +template<int datasize> +ALWAYS_INLINE bool MacroAssemblerARM64::tryLoadWithOffset(FPRegisterID rt, RegisterID rn, int32_t offset) + { + if (ARM64Assembler::canEncodeSImmOffset(offset)) { + m_assembler.ldur<datasize>(rt, rn, offset); + return true; + } + if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) { + m_assembler.ldr<datasize>(rt, rn, static_cast<unsigned>(offset)); + return true; + } + return false; + } + } // namespace JSC #endif // ENABLE(ASSEMBLER) |