Include the ARMv7 assembler in the qmldevtools bootstrap build

Even when the C++ target is not ARMv7 we want to include it in order to
be able to generate QML cache files with code ahead of time.

This requires a few changes:

* The Jump classes need to move from the AbstractMacroAssembler
  super-class into the concrete assembler sub-class, in order to
  use it in specializations.
* Some of the template specializations in LinkBuffer for example or
  for platform dependent operations need to be pre-processor enabled
  when bootstrapping
* The generic loadPtr/addPtr etc. functions need to move to the concrete
  assemblers to be able to call the correct 32-bit or 64-bit variations.
* We need to force what looks like a loss of precision to the compiler
  in the 32-bit ARMv7 linking code when linking jumps.

Finally then we can explicitly instantiate at least QV4::JIT::Assembler
for ARMv7 when bootstrapping. Currently only on x86-64 hosts, but that
is a temporary limitation.

Change-Id: I501db2360e1fded48f17f17d9e87252d47f8537e
Reviewed-by: Simon Hausmann <simon.hausmann@qt.io>

1 files changed, 32 insertions, 0 deletions

diff --git a/src/3rdparty/masm/assembler/MacroAssemblerX86.h b/src/3rdparty/masm/assembler/MacroAssemblerX86.h
index c42100bbcb..742a4b48f7 100644
--- a/src/3rdparty/masm/assembler/MacroAssemblerX86.h
+++ b/src/3rdparty/masm/assembler/MacroAssemblerX86.h
@@ -54,6 +54,38 @@ public:
     using MacroAssemblerX86Common::convertInt32ToDouble;
     using MacroAssemblerX86Common::branchTest8;
 
+#if defined(V4_BOOTSTRAP)
+    void loadPtr(ImplicitAddress address, RegisterID dest)
+    {
+        load32(address, dest);
+    }
+
+    void subPtr(TrustedImm32 imm, RegisterID dest)
+    {
+        sub32(imm, dest);
+    }
+
+    void addPtr(TrustedImm32 imm, RegisterID dest)
+    {
+        add32(imm, dest);
+    }
+
+    void addPtr(TrustedImm32 imm, RegisterID src, RegisterID dest)
+    {
+        add32(imm, src, dest);
+    }
+
+    void storePtr(RegisterID src, ImplicitAddress address)
+    {
+        store32(src, address);
+    }
+
+    Jump branchTest8(ResultCondition cond, ExtendedAddress address, TrustedImm32 mask = TrustedImm32(-1))
+    {
+        return branchTest8(cond, Address(address.base, address.offset), mask);
+    }
+#endif
+
     void add32(TrustedImm32 imm, RegisterID src, RegisterID dest)
     {
         m_assembler.leal_mr(imm.m_value, src, dest);