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authorSimon Hausmann <simon.hausmann@digia.com>2013-04-12 12:58:29 +0200
committerLars Knoll <lars.knoll@digia.com>2013-04-12 17:30:06 +0200
commitfd09b7d9b54ccb4d737747ee7fba26f15f4901cd (patch)
treecb8b68211b0eff5c2b4927182c93749b053edb71 /src/3rdparty/masm/assembler/SH4Assembler.h
parent89be8e111c34bf6e96710e574c251587dd59f42b (diff)
WTF/JSC update to r148273
This brings in various bug fixes in the ARM and MIPS assemblers as well as a Yarr crash fix and performance fix. This change doesn't compile as-is, but the next change will apply the modifications necessary to compile. That'll make future updates easier as it allows for cherry-picking because the modifications are usually always the same. Change-Id: Iac32f62c71e8ff908deb41f28f12fbc98c0823e1 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
Diffstat (limited to 'src/3rdparty/masm/assembler/SH4Assembler.h')
-rw-r--r--src/3rdparty/masm/assembler/SH4Assembler.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/3rdparty/masm/assembler/SH4Assembler.h b/src/3rdparty/masm/assembler/SH4Assembler.h
index 39f5585be1..b7a166ea99 100644
--- a/src/3rdparty/masm/assembler/SH4Assembler.h
+++ b/src/3rdparty/masm/assembler/SH4Assembler.h
@@ -534,7 +534,7 @@ public:
oneShortOp(getOpcodeGroup2(SHLL16_OPCODE, dst));
break;
default:
- ASSERT_NOT_REACHED();
+ RELEASE_ASSERT_NOT_REACHED();
}
}
@@ -584,7 +584,7 @@ public:
oneShortOp(getOpcodeGroup2(SHLR16_OPCODE, dst));
break;
default:
- ASSERT_NOT_REACHED();
+ RELEASE_ASSERT_NOT_REACHED();
}
}
@@ -654,7 +654,7 @@ public:
oneShortOp(getOpcodeGroup1(CMPGT_OPCODE, left, right));
break;
default:
- ASSERT_NOT_REACHED();
+ RELEASE_ASSERT_NOT_REACHED();
}
}
@@ -731,7 +731,7 @@ public:
oneShortOp(getOpcodeGroup5(BF_OPCODE, label));
break;
default:
- ASSERT_NOT_REACHED();
+ RELEASE_ASSERT_NOT_REACHED();
}
}
@@ -751,7 +751,7 @@ public:
oneShortOp(getOpcodeGroup2(BSRF_OPCODE, reg));
break;
default:
- ASSERT_NOT_REACHED();
+ RELEASE_ASSERT_NOT_REACHED();
}
}