V4 JIT: tune generated instructions for inplace binops

Generate better code for in-place binary operations where the right-hand
side is either a constant or a memory address. Now that the JIT can do
this, also tell the register allocator not to un-spill that right-hand
side.

Change-Id: I0ab852f6b92f90dfed99c05fbaf91aad2549ecf4
Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>

1 files changed, 18 insertions, 0 deletions

diff --git a/src/3rdparty/masm/assembler/MacroAssemblerARMv7.h b/src/3rdparty/masm/assembler/MacroAssemblerARMv7.h
index 2be073e314..15e427bbff 100644
--- a/src/3rdparty/masm/assembler/MacroAssemblerARMv7.h
+++ b/src/3rdparty/masm/assembler/MacroAssemblerARMv7.h
@@ -321,6 +321,12 @@ public:
         m_assembler.smull(dest, dataTempRegister, op1, op2);
     }
 
+    void mul32(Address src, RegisterID dest)
+    {
+        load32(src, dataTempRegister);
+        mul32(dataTempRegister, dest);
+    }
+
     void neg32(RegisterID srcDest)
     {
         m_assembler.neg(srcDest, srcDest);
@@ -330,6 +336,12 @@ public:
     {
         m_assembler.orr(dest, dest, src);
     }
+
+    void or32(Address src, RegisterID dest)
+    {
+        load32(src, dataTempRegister);
+        or32(dataTempRegister, dest);
+    }
     
     void or32(RegisterID src, AbsoluteAddress dest)
     {
@@ -466,6 +478,12 @@ public:
         store32(dataTempRegister, address.m_ptr);
     }
 
+    void xor32(Address src, RegisterID dest)
+    {
+        load32(src, dataTempRegister);
+        xor32(dataTempRegister, dest);
+    }
+
     void xor32(RegisterID op1, RegisterID op2, RegisterID dest)
     {
         m_assembler.eor(dest, op1, op2);