diff options
| author | Erik Verbruggen <erik.verbruggen@digia.com> | 2014-01-31 12:30:13 +0100 |
|---|---|---|
| committer | The Qt Project <gerrit-noreply@qt-project.org> | 2014-02-17 11:52:01 +0100 |
| commit | 5efc7ae82b36da3a96bd4a1ea8ccb8fa90c6884c (patch) | |
| tree | 52623d7efd350186cb3b578b811a0af290a1d713 /src/qml/compiler/qv4isel_masm.cpp | |
| parent | 4735504249428b00f18fdf5e498a4740fe16b089 (diff) | |
V4 JIT: move registers for regalloc out of method.
This is a clean-up: by moving the description of the registers available
for allocation out of the run method, the method gets easier to read,
and the lists are easier to extend when adding more platforms.
Change-Id: I840a15cda0e02488b7e038aa23cedd23508ed736
Reviewed-by: Lars Knoll <lars.knoll@digia.com>
Diffstat (limited to 'src/qml/compiler/qv4isel_masm.cpp')
| -rw-r--r-- | src/qml/compiler/qv4isel_masm.cpp | 62 |
1 files changed, 38 insertions, 24 deletions
diff --git a/src/qml/compiler/qv4isel_masm.cpp b/src/qml/compiler/qv4isel_masm.cpp index c89b108309..0289abd50f 100644 --- a/src/qml/compiler/qv4isel_masm.cpp +++ b/src/qml/compiler/qv4isel_masm.cpp @@ -555,6 +555,41 @@ InstructionSelection::~InstructionSelection() delete _as; } +#if (CPU(X86_64) && (OS(MAC_OS_X) || OS(LINUX))) || (CPU(X86) && OS(LINUX)) +# define REGALLOC_IS_SUPPORTED +static QVector<int> getIntRegisters() +{ +# if CPU(X86) && OS(LINUX) // x86 with linux + static const QVector<int> intRegisters = QVector<int>() + << JSC::X86Registers::edx + << JSC::X86Registers::ebx; +# else // x86_64 with linux or with macos + static const QVector<int> intRegisters = QVector<int>() + << JSC::X86Registers::edi + << JSC::X86Registers::esi + << JSC::X86Registers::edx + << JSC::X86Registers::r9 + << JSC::X86Registers::r8 + << JSC::X86Registers::r13 + << JSC::X86Registers::r15; +# endif + return intRegisters; +} + +static QVector<int> getFpRegisters() +{ +// linux/x86_64, linux/x86, and macos/x86_64: + static const QVector<int> fpRegisters = QVector<int>() + << JSC::X86Registers::xmm2 + << JSC::X86Registers::xmm3 + << JSC::X86Registers::xmm4 + << JSC::X86Registers::xmm5 + << JSC::X86Registers::xmm6 + << JSC::X86Registers::xmm7; + return fpRegisters; +} +#endif + void InstructionSelection::run(int functionIndex) { V4IR::Function *function = irModule->functions[functionIndex]; @@ -564,33 +599,12 @@ void InstructionSelection::run(int functionIndex) V4IR::Optimizer opt(_function); opt.run(qmlEngine); -#if (CPU(X86_64) && (OS(MAC_OS_X) || OS(LINUX))) || (CPU(X86) && OS(LINUX)) +#ifdef REGALLOC_IS_SUPPORTED static const bool withRegisterAllocator = qgetenv("QV4_NO_REGALLOC").isEmpty(); if (opt.isInSSA() && withRegisterAllocator) { -#if CPU(X86) && OS(LINUX) // x86 with linux - static const QVector<int> intRegisters = QVector<int>() - << JSC::X86Registers::edx - << JSC::X86Registers::ebx; -#else // x86_64 with linux or with macos - static const QVector<int> intRegisters = QVector<int>() - << JSC::X86Registers::edi - << JSC::X86Registers::esi - << JSC::X86Registers::edx - << JSC::X86Registers::r9 - << JSC::X86Registers::r8 - << JSC::X86Registers::r13 - << JSC::X86Registers::r15; -#endif - static const QVector<int> fpRegisters = QVector<int>() - << JSC::X86Registers::xmm2 - << JSC::X86Registers::xmm3 - << JSC::X86Registers::xmm4 - << JSC::X86Registers::xmm5 - << JSC::X86Registers::xmm6 - << JSC::X86Registers::xmm7; - RegisterAllocator(intRegisters, fpRegisters).run(_function, opt); + RegisterAllocator(getIntRegisters(), getFpRegisters()).run(_function, opt); } else -#endif +#endif // REGALLOC_IS_SUPPORTED { if (opt.isInSSA()) // No register allocator available for this platform, or env. var was set, so: |