diff options
author | Erik Verbruggen <erik.verbruggen@me.com> | 2013-09-20 15:48:47 +0200 |
---|---|---|
committer | The Qt Project <gerrit-noreply@qt-project.org> | 2013-09-25 09:46:11 +0200 |
commit | 51c31660b147c5cd9912ce6670399aa2bb4fb831 (patch) | |
tree | 6b3c62b2b4c0f639a5bb73475d7d671c353a232e /src/qml/compiler/qv4isel_masm.cpp | |
parent | 226f8cc9fe166ba15ead8e6fdefe9bbaad40b697 (diff) |
V4 JIT: fixes after NaN boxing changes.
Change-Id: I22a1b46f488dc65513ed287dabe7d85469cc5173
Reviewed-by: Lars Knoll <lars.knoll@digia.com>
Diffstat (limited to 'src/qml/compiler/qv4isel_masm.cpp')
-rw-r--r-- | src/qml/compiler/qv4isel_masm.cpp | 46 |
1 files changed, 17 insertions, 29 deletions
diff --git a/src/qml/compiler/qv4isel_masm.cpp b/src/qml/compiler/qv4isel_masm.cpp index 27cc764f2d..f80ce99538 100644 --- a/src/qml/compiler/qv4isel_masm.cpp +++ b/src/qml/compiler/qv4isel_masm.cpp @@ -1842,6 +1842,9 @@ void InstructionSelection::visitRet(V4IR::Ret *s) if (t->type == V4IR::DoubleType) { _as->moveDoubleTo64((Assembler::FPRegisterID) t->index, Assembler::ReturnValueRegister); + _as->move(Assembler::TrustedImm64(QV4::Value::NaNEncodeMask), + Assembler::ScratchRegister); + _as->xor64(Assembler::ScratchRegister, Assembler::ReturnValueRegister); } else if (t->type == V4IR::UInt32Type) { Address tmp = addressForArgument(0); _as->storeUInt32((Assembler::RegisterID) t->index, Pointer(tmp)); @@ -2056,26 +2059,10 @@ void InstructionSelection::doubleBinop(V4IR::AluOp oper, V4IR::Expr *leftSource, switch (oper) { case V4IR::OpAdd: - if (V4IR::Const *c = rightSource->asConst()) { - _as->moveDouble(_as->toDoubleRegister(leftSource, targetReg), targetReg); - Assembler::ImplicitAddress addr = - _as->constantTable().loadValueAddress(c, Assembler::ScratchRegister); - _as->addDouble(Address(addr.base, addr.offset), targetReg); - break; - } - _as->addDouble(_as->toDoubleRegister(leftSource), _as->toDoubleRegister(rightSource), targetReg); break; case V4IR::OpMul: - if (V4IR::Const *c = rightSource->asConst()) { - _as->moveDouble(_as->toDoubleRegister(leftSource, targetReg), targetReg); - Assembler::ImplicitAddress addr = - _as->constantTable().loadValueAddress(c, Assembler::ScratchRegister); - _as->mulDouble(Address(addr.base, addr.offset), targetReg); - break; - } - _as->mulDouble(_as->toDoubleRegister(leftSource), _as->toDoubleRegister(rightSource), targetReg); break; @@ -2088,15 +2075,16 @@ void InstructionSelection::doubleBinop(V4IR::AluOp oper, V4IR::Expr *leftSource, _as->subDouble(Assembler::FPGpr0, targetReg); break; } - } -#endif - if (V4IR::Const *c = rightSource->asConst()) { + } else if (rightSource->asConst() && targetReg == Assembler::FPGpr0) { + Q_ASSERT(leftSource->asTemp()); + Q_ASSERT(leftSource->asTemp()->kind == V4IR::Temp::PhysicalRegister); _as->moveDouble(_as->toDoubleRegister(leftSource, targetReg), targetReg); - Assembler::ImplicitAddress addr = - _as->constantTable().loadValueAddress(c, Assembler::ScratchRegister); - _as->subDouble(Address(addr.base, addr.offset), targetReg); + Assembler::FPRegisterID reg = (Assembler::FPRegisterID) leftSource->asTemp()->index; + _as->moveDouble(_as->toDoubleRegister(rightSource, reg), reg); + _as->subDouble(reg, targetReg); break; } +#endif _as->subDouble(_as->toDoubleRegister(leftSource), _as->toDoubleRegister(rightSource), targetReg); @@ -2110,16 +2098,16 @@ void InstructionSelection::doubleBinop(V4IR::AluOp oper, V4IR::Expr *leftSource, _as->divDouble(Assembler::FPGpr0, targetReg); break; } - } -#endif - if (V4IR::Const *c = rightSource->asConst()) { + } else if (rightSource->asConst() && targetReg == Assembler::FPGpr0) { + Q_ASSERT(leftSource->asTemp()); + Q_ASSERT(leftSource->asTemp()->kind == V4IR::Temp::PhysicalRegister); _as->moveDouble(_as->toDoubleRegister(leftSource, targetReg), targetReg); - Assembler::ImplicitAddress addr = - _as->constantTable().loadValueAddress(c, Assembler::ScratchRegister); - _as->divDouble(Address(addr.base, addr.offset), targetReg); + Assembler::FPRegisterID reg = (Assembler::FPRegisterID) leftSource->asTemp()->index; + _as->moveDouble(_as->toDoubleRegister(rightSource, reg), reg); + _as->divDouble(reg, targetReg); break; } - +#endif _as->divDouble(_as->toDoubleRegister(leftSource), _as->toDoubleRegister(rightSource), targetReg); break; |