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authorLars Knoll <lars.knoll@digia.com>2014-02-06 14:56:32 +0100
committerThe Qt Project <gerrit-noreply@qt-project.org>2014-02-07 10:44:22 +0100
commit357e034f70a60e4016e0f0cd25f97631080cc60a (patch)
tree45ed60f356980c7b0aa5512d9d101d4ce1fe257f /src/qml/compiler/qv4isel_moth.cpp
parent9a61f10f268f15dc3dcdabe70ec2c4969cf206d8 (diff)
Add specialized instructions for right and left shift
These give a measurable speedup as the critical code paths are now inline. Change-Id: I3cee8a432fbe96d66ba1e6bd277a38e624a50c14 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
Diffstat (limited to 'src/qml/compiler/qv4isel_moth.cpp')
-rw-r--r--src/qml/compiler/qv4isel_moth.cpp32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/qml/compiler/qv4isel_moth.cpp b/src/qml/compiler/qv4isel_moth.cpp
index b34f5891b3..e67e351ba7 100644
--- a/src/qml/compiler/qv4isel_moth.cpp
+++ b/src/qml/compiler/qv4isel_moth.cpp
@@ -806,6 +806,38 @@ Param InstructionSelection::binopHelper(V4IR::AluOp oper, V4IR::Expr *leftSource
addInstruction(bitXor);
return bitXor.result;
}
+ if (oper == V4IR::OpRShift) {
+ if (V4IR::Const *c = rightSource->asConst()) {
+ Instruction::ShrConst shr;
+ shr.lhs = getParam(leftSource);
+ shr.rhs = convertToValue(c).Value::toInt32() & 0x1f;
+ shr.result = getResultParam(target);
+ addInstruction(shr);
+ return shr.result;
+ }
+ Instruction::Shr shr;
+ shr.lhs = getParam(leftSource);
+ shr.rhs = getParam(rightSource);
+ shr.result = getResultParam(target);
+ addInstruction(shr);
+ return shr.result;
+ }
+ if (oper == V4IR::OpLShift) {
+ if (V4IR::Const *c = rightSource->asConst()) {
+ Instruction::ShlConst shl;
+ shl.lhs = getParam(leftSource);
+ shl.rhs = convertToValue(c).Value::toInt32() & 0x1f;
+ shl.result = getResultParam(target);
+ addInstruction(shl);
+ return shl.result;
+ }
+ Instruction::Shl shl;
+ shl.lhs = getParam(leftSource);
+ shl.rhs = getParam(rightSource);
+ shl.result = getResultParam(target);
+ addInstruction(shl);
+ return shl.result;
+ }
if (oper == V4IR::OpInstanceof || oper == V4IR::OpIn || oper == V4IR::OpAdd) {
Instruction::BinopContext binop;