diff options
| author | Lars Knoll <lars.knoll@digia.com> | 2013-10-11 23:20:16 +0200 |
|---|---|---|
| committer | The Qt Project <gerrit-noreply@qt-project.org> | 2013-10-12 19:01:11 +0200 |
| commit | dc46921c837c531bc4483f830fcaf59f859604d7 (patch) | |
| tree | fd09e72cda06446757a85e3459960aa3c695eeb5 /src/qml/compiler/qv4regalloc.cpp | |
| parent | 41b027c3992483b29940a8cc891ead8d35cec966 (diff) | |
Implement >>> inline for the JIT backend
The unsigned right shift operations can use a signed int as input, unifying
the handling with the other shift operations. The only difference now is
in the type of the return value.
Change-Id: Ia9b83568951d1c1c77322d07cd734e2c37d34573
Reviewed-by: Erik Verbruggen <erik.verbruggen@digia.com>
Diffstat (limited to 'src/qml/compiler/qv4regalloc.cpp')
| -rw-r--r-- | src/qml/compiler/qv4regalloc.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/qml/compiler/qv4regalloc.cpp b/src/qml/compiler/qv4regalloc.cpp index ec4027c69d..c35ee860f7 100644 --- a/src/qml/compiler/qv4regalloc.cpp +++ b/src/qml/compiler/qv4regalloc.cpp @@ -456,7 +456,7 @@ protected: // IRDecoder || (oper >= OpGt && oper <= OpStrictNotEqual)) { needsCall = false; } - } if (oper == OpBitAnd || oper == OpBitOr || oper == OpBitXor || oper == OpLShift || oper == OpRShift) { + } if (oper == OpBitAnd || oper == OpBitOr || oper == OpBitXor || oper == OpLShift || oper == OpRShift || oper == OpURShift) { needsCall = false; } |