diff options
| author | Erik Verbruggen <erik.verbruggen@me.com> | 2013-09-09 15:36:09 +0200 |
|---|---|---|
| committer | The Qt Project <gerrit-noreply@qt-project.org> | 2013-09-20 12:42:33 +0200 |
| commit | 857b135d77221769dadec54daa6540f431245c7a (patch) | |
| tree | f9a2d434c20e4a484c2bcb1bb40d48831c3dd31e /src/qml/compiler/qv4regalloc.cpp | |
| parent | d33fe17cd1fddd8dee0a26dc46f5062c34f11216 (diff) | |
V4 JIT: generate inline code for more binops.
Bitwise-and, shift left, and shift-right.
Change-Id: Ifa949c60261054218797302673822f480f47bd6e
Reviewed-by: Lars Knoll <lars.knoll@digia.com>
Diffstat (limited to 'src/qml/compiler/qv4regalloc.cpp')
| -rw-r--r-- | src/qml/compiler/qv4regalloc.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/qml/compiler/qv4regalloc.cpp b/src/qml/compiler/qv4regalloc.cpp index 8a879aa40c..926526c5fd 100644 --- a/src/qml/compiler/qv4regalloc.cpp +++ b/src/qml/compiler/qv4regalloc.cpp @@ -426,6 +426,14 @@ protected: // IRDecoder || (oper >= OpGt && oper <= OpStrictNotEqual)) { needsCall = false; } + } else if (leftSource->type == SInt32Type && rightSource->type == SInt32Type) { + if (oper == OpBitAnd) { + needsCall = false; + } + } else if (leftSource->type == SInt32Type && rightSource->type == UInt32Type) { + if (oper == OpLShift || oper == OpRShift) { + needsCall = false; + } } #if 0 // TODO: change masm to generate code |