diff options
| author | Erik Verbruggen <erik.verbruggen@me.com> | 2013-10-11 18:28:54 +0200 |
|---|---|---|
| committer | The Qt Project <gerrit-noreply@qt-project.org> | 2013-10-12 13:14:07 +0200 |
| commit | 41b027c3992483b29940a8cc891ead8d35cec966 (patch) | |
| tree | 961c488358b20b71bc44c8411d7ab35f2aed4e15 /src/qml/compiler/qv4regalloc.cpp | |
| parent | 6f886cd6a841eeb76e1c590b8abd3af6fdd5c494 (diff) | |
V4 JIT: fix register allocator after change to s/uint32 usage.
Now that shifts can take a signed int32, reflect it in the check if a
binop will generate a call.
Change-Id: I3cab436bace31cdda327cf6132aa873b6c5456b1
Reviewed-by: Lars Knoll <lars.knoll@digia.com>
Diffstat (limited to 'src/qml/compiler/qv4regalloc.cpp')
| -rw-r--r-- | src/qml/compiler/qv4regalloc.cpp | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/src/qml/compiler/qv4regalloc.cpp b/src/qml/compiler/qv4regalloc.cpp index b4ec0f357b..ec4027c69d 100644 --- a/src/qml/compiler/qv4regalloc.cpp +++ b/src/qml/compiler/qv4regalloc.cpp @@ -456,14 +456,8 @@ protected: // IRDecoder || (oper >= OpGt && oper <= OpStrictNotEqual)) { needsCall = false; } - } else if (leftSource->type == SInt32Type && rightSource->type == SInt32Type) { - if (oper == OpBitAnd || oper == OpBitOr || oper == OpBitXor) { - needsCall = false; - } - } else if (leftSource->type == SInt32Type && rightSource->type == UInt32Type) { - if (oper == OpLShift || oper == OpRShift) { - needsCall = false; - } + } if (oper == OpBitAnd || oper == OpBitOr || oper == OpBitXor || oper == OpLShift || oper == OpRShift) { + needsCall = false; } addDef(target); |