diff options
author | Lars Knoll <lars.knoll@qt.io> | 2017-02-07 10:39:48 +0100 |
---|---|---|
committer | Lars Knoll <lars.knoll@qt.io> | 2017-03-09 08:59:14 +0000 |
commit | d06b171582104db5f0b61ee782fb835dd6038d62 (patch) | |
tree | 2950d3ba3a4c952637837dcd9450b0603b0b7960 /src/qml/jit/qv4assembler.cpp | |
parent | acd9771544811c8dca28575b7d546abbb0271fbb (diff) |
Mark where we need a write barrier in the JIT
Separate the loadAddress calls into loadAddressForReading
and loadAddressForWriting. In the second case, add an
out argument that specifies whether the write will need
a barrier.
Pass the write barrier type that is required for a store
down into the actual store methods.
Change-Id: I3f7634ab82d82f1b20dab331e083d1a662cd314e
Reviewed-by: Simon Hausmann <simon.hausmann@qt.io>
Diffstat (limited to 'src/qml/jit/qv4assembler.cpp')
-rw-r--r-- | src/qml/jit/qv4assembler.cpp | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/src/qml/jit/qv4assembler.cpp b/src/qml/jit/qv4assembler.cpp index 0b8be97ef5..59470aeea2 100644 --- a/src/qml/jit/qv4assembler.cpp +++ b/src/qml/jit/qv4assembler.cpp @@ -246,13 +246,16 @@ void Assembler<TargetConfiguration>::generateCJumpOnCompare(RelationalCondition } template <typename TargetConfiguration> -typename Assembler<TargetConfiguration>::Pointer Assembler<TargetConfiguration>::loadAddress(RegisterID tmp, IR::Expr *e) +typename Assembler<TargetConfiguration>::Pointer +Assembler<TargetConfiguration>::loadAddressForWriting(RegisterID tmp, IR::Expr *e, WriteBarrier::Type *barrier) { + if (barrier) + *barrier = WriteBarrier::NoBarrier; IR::Temp *t = e->asTemp(); if (t) return loadTempAddress(t); else - return loadArgLocalAddress(tmp, e->asArgLocal()); + return loadArgLocalAddressForWriting(tmp, e->asArgLocal(), barrier); } template <typename TargetConfiguration> @@ -265,7 +268,8 @@ typename Assembler<TargetConfiguration>::Pointer Assembler<TargetConfiguration>: } template <typename TargetConfiguration> -typename Assembler<TargetConfiguration>::Pointer Assembler<TargetConfiguration>::loadArgLocalAddress(RegisterID baseReg, IR::ArgLocal *al) +typename Assembler<TargetConfiguration>::Pointer +Assembler<TargetConfiguration>::loadArgLocalAddressForWriting(RegisterID baseReg, IR::ArgLocal *al, WriteBarrier::Type *barrier) { int32_t offset = 0; int scope = al->scope; @@ -291,6 +295,8 @@ typename Assembler<TargetConfiguration>::Pointer Assembler<TargetConfiguration>: default: Q_UNREACHABLE(); } + if (barrier) + *barrier = _function->argLocalRequiresWriteBarrier(al) ? WriteBarrier::Barrier : WriteBarrier::NoBarrier; return Pointer(baseReg, offset); } @@ -329,8 +335,9 @@ void Assembler<TargetConfiguration>::loadStringRef(RegisterID reg, const QString template <typename TargetConfiguration> void Assembler<TargetConfiguration>::storeValue(QV4::Primitive value, IR::Expr *destination) { - Address addr = loadAddress(ScratchRegister, destination); - storeValue(value, addr); + WriteBarrier::Type barrier; + Address addr = loadAddressForWriting(ScratchRegister, destination, &barrier); + storeValue(value, addr, barrier); } template <typename TargetConfiguration> @@ -419,7 +426,7 @@ typename Assembler<TargetConfiguration>::Jump Assembler<TargetConfiguration>::ge // It's not a number type, so it cannot be in a register. Q_ASSERT(src->asArgLocal() || src->asTemp()->kind != IR::Temp::PhysicalRegister || src->type == IR::BoolType); - Assembler::Pointer tagAddr = loadAddress(Assembler::ScratchRegister, src); + Assembler::Pointer tagAddr = loadAddressForReading(Assembler::ScratchRegister, src); tagAddr.offset += 4; load32(tagAddr, Assembler::ScratchRegister); |