diff options
| author | Erik Verbruggen <erik.verbruggen@digia.com> | 2014-06-27 14:37:50 +0200 |
|---|---|---|
| committer | Erik Verbruggen <erik.verbruggen@digia.com> | 2014-08-12 09:50:28 +0200 |
| commit | 99d0921e2d2a20b956cab172d472f7c369c05008 (patch) | |
| tree | e39b890261ff91862e5c1a0718c3408c41c927a8 /src/qml/jit/qv4assembler_p.h | |
| parent | 430853836f9c17154ef3ee4cac6b03b90ee493a9 (diff) | |
V4 JIT: tune generated instructions for inplace binops
Generate better code for in-place binary operations where the right-hand
side is either a constant or a memory address. Now that the JIT can do
this, also tell the register allocator not to un-spill that right-hand
side.
Change-Id: I0ab852f6b92f90dfed99c05fbaf91aad2549ecf4
Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
Diffstat (limited to 'src/qml/jit/qv4assembler_p.h')
| -rw-r--r-- | src/qml/jit/qv4assembler_p.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/qml/jit/qv4assembler_p.h b/src/qml/jit/qv4assembler_p.h index 5e1f162f39..4c5d2aeddd 100644 --- a/src/qml/jit/qv4assembler_p.h +++ b/src/qml/jit/qv4assembler_p.h @@ -283,8 +283,8 @@ public: ConstantTable(Assembler *as): _as(as) {} int add(const QV4::Primitive &v); - ImplicitAddress loadValueAddress(IR::Const *c, RegisterID baseReg); - ImplicitAddress loadValueAddress(const QV4::Primitive &v, RegisterID baseReg); + Address loadValueAddress(IR::Const *c, RegisterID baseReg); + Address loadValueAddress(const QV4::Primitive &v, RegisterID baseReg); void finalize(JSC::LinkBuffer &linkBuffer, InstructionSelection *isel); private: |