diff options
author | Simon Hausmann <simon.hausmann@qt.io> | 2017-01-30 15:11:12 +0100 |
---|---|---|
committer | Simon Hausmann <simon.hausmann@qt.io> | 2017-01-31 20:45:43 +0000 |
commit | a159d6d43da100c5a4acb183589fa4554b33a474 (patch) | |
tree | 36d8e001a6b195c589b83193f74241fb9faf09bd /src/qml/jit | |
parent | da5618556d921aecb86bd89cf0bcffb878b0e564 (diff) |
Remove platform ifdefs for ISE::convertTypeToDouble
Change-Id: I75db85fbd601d4790a3cb9af483474a976d00e86
Reviewed-by: Lars Knoll <lars.knoll@qt.io>
Diffstat (limited to 'src/qml/jit')
-rw-r--r-- | src/qml/jit/qv4assembler_p.h | 26 | ||||
-rw-r--r-- | src/qml/jit/qv4isel_masm.cpp | 18 |
2 files changed, 28 insertions, 16 deletions
diff --git a/src/qml/jit/qv4assembler_p.h b/src/qml/jit/qv4assembler_p.h index bca3985bb6..6d8d773ff0 100644 --- a/src/qml/jit/qv4assembler_p.h +++ b/src/qml/jit/qv4assembler_p.h @@ -345,6 +345,13 @@ struct RegisterSizeDependentAssembler<JITAssembler, MacroAssembler, TargetPlatfo destAddr.offset += 4; as->store32(TrustedImm32(QV4::Value::Managed_Type_Internal_32), destAddr); } + + static Jump generateIsDoubleCheck(JITAssembler *as, RegisterID tagOrValueRegister) + { + as->and32(TrustedImm32(Value::NotDouble_Mask), tagOrValueRegister); + return as->branch32(RelationalCondition::NotEqual, tagOrValueRegister, + TrustedImm32(Value::NotDouble_Mask)); + } }; template <typename JITAssembler, typename MacroAssembler, typename TargetPlatform> @@ -611,6 +618,13 @@ struct RegisterSizeDependentAssembler<JITAssembler, MacroAssembler, TargetPlatfo { as->store64(registerWithPtr, destAddr); } + + static Jump generateIsDoubleCheck(JITAssembler *as, RegisterID tagOrValueRegister) + { + as->rshift32(TrustedImm32(Value::IsDoubleTag_Shift), tagOrValueRegister); + return as->branch32(RelationalCondition::NotEqual, tagOrValueRegister, + TrustedImm32(0)); + } }; template <typename TargetConfiguration> @@ -912,6 +926,11 @@ public: _nextBlock, currentBlock, trueBlock, falseBlock); } + Jump generateIsDoubleCheck(RegisterID tagOrValueRegister) + { + return RegisterSizeDependentOps::generateIsDoubleCheck(this, tagOrValueRegister); + } + Jump genTryDoubleConversion(IR::Expr *src, FPRegisterID dest); Jump branchDouble(bool invertCondition, IR::AluOp op, IR::Expr *left, IR::Expr *right); Jump branchInt32(bool invertCondition, IR::AluOp op, IR::Expr *left, IR::Expr *right); @@ -1176,6 +1195,13 @@ public: TargetConfiguration::MacroAssembler::storeDouble(FPGpr0, target); } + // The scratch register is used to calculate the temp address for the source. + void memcopyValue(IR::Expr *target, Pointer source, FPRegisterID fpScratchRegister, RegisterID scratchRegister) + { + TargetConfiguration::MacroAssembler::loadDouble(source, fpScratchRegister); + TargetConfiguration::MacroAssembler::storeDouble(fpScratchRegister, loadAddress(scratchRegister, target)); + } + void storeValue(QV4::Primitive value, RegisterID destination) { Q_UNUSED(value); diff --git a/src/qml/jit/qv4isel_masm.cpp b/src/qml/jit/qv4isel_masm.cpp index b3b9ddb120..a3ab123dfd 100644 --- a/src/qml/jit/qv4isel_masm.cpp +++ b/src/qml/jit/qv4isel_masm.cpp @@ -962,15 +962,7 @@ void InstructionSelection<JITAssembler>::convertTypeToDouble(IR::Expr *source, I // not an int, check if it's NOT a double: isNoInt.link(_as); -#ifdef QV4_USE_64_BIT_VALUE_ENCODING - _as->rshift32(TrustedImm32(Value::IsDoubleTag_Shift), JITTargetPlatform::ScratchRegister); - Jump isDbl = _as->branch32(RelationalCondition::NotEqual, JITTargetPlatform::ScratchRegister, - TrustedImm32(0)); -#else - _as->and32(TrustedImm32(Value::NotDouble_Mask), JITTargetPlatform::ScratchRegister); - Jump isDbl = _as->branch32(RelationalCondition::NotEqual, JITTargetPlatform::ScratchRegister, - TrustedImm32(Value::NotDouble_Mask)); -#endif + Jump isDbl = _as->generateIsDoubleCheck(JITTargetPlatform::ScratchRegister); generateRuntimeCall(_as, target, toDouble, PointerToValue(source)); Jump noDoubleDone = _as->jump(); @@ -980,13 +972,7 @@ void InstructionSelection<JITAssembler>::convertTypeToDouble(IR::Expr *source, I Pointer addr2 = _as->loadAddress(JITTargetPlatform::ScratchRegister, source); IR::Temp *targetTemp = target->asTemp(); if (!targetTemp || targetTemp->kind == IR::Temp::StackSlot) { -#if Q_PROCESSOR_WORDSIZE == 8 - _as->load64(addr2, JITTargetPlatform::ScratchRegister); - _as->store64(JITTargetPlatform::ScratchRegister, _as->loadAddress(JITTargetPlatform::ReturnValueRegister, target)); -#else - _as->loadDouble(addr2, JITTargetPlatform::FPGpr0); - _as->storeDouble(JITTargetPlatform::FPGpr0, _as->loadAddress(JITTargetPlatform::ReturnValueRegister, target)); -#endif + _as->memcopyValue(target, addr2, JITTargetPlatform::FPGpr0, JITTargetPlatform::ReturnValueRegister); } else { _as->loadDouble(addr2, (FPRegisterID) targetTemp->index); } |