diff options
author | Liang Qi <liang.qi@qt.io> | 2017-02-28 13:04:16 +0100 |
---|---|---|
committer | Liang Qi <liang.qi@qt.io> | 2017-02-28 13:04:17 +0100 |
commit | afec9016d0fd51345ea93a1bbadb99b5c3fdf629 (patch) | |
tree | 39aa0d02457c643065fbfb298645b2f3877c92bb /src/qml/jit | |
parent | bb1acc24587ebdecc4051ef4b573ef32cfb8a8c5 (diff) | |
parent | ba68c325688acf3072715757480497524f61c425 (diff) |
Merge remote-tracking branch 'origin/5.9' into dev
Change-Id: I92b13a9c1727644d63e125c1e6f1fdac72720ad7
Diffstat (limited to 'src/qml/jit')
-rw-r--r-- | src/qml/jit/qv4binop.cpp | 1 | ||||
-rw-r--r-- | src/qml/jit/qv4regalloc.cpp | 2 | ||||
-rw-r--r-- | src/qml/jit/qv4targetplatform_p.h | 31 |
3 files changed, 19 insertions, 15 deletions
diff --git a/src/qml/jit/qv4binop.cpp b/src/qml/jit/qv4binop.cpp index 6d20a4e042..22067bbb13 100644 --- a/src/qml/jit/qv4binop.cpp +++ b/src/qml/jit/qv4binop.cpp @@ -331,7 +331,6 @@ void Binop<JITAssembler>::doubleBinop(IR::Expr *lhs, IR::Expr *rhs, IR::Expr *ta break; default: { - Q_ASSERT(target->type == IR::BoolType); Jump trueCase = as->branchDouble(false, op, lhs, rhs); as->storeBool(false, target); Jump done = as->jump(); diff --git a/src/qml/jit/qv4regalloc.cpp b/src/qml/jit/qv4regalloc.cpp index d5da863ee0..e5abaa7458 100644 --- a/src/qml/jit/qv4regalloc.cpp +++ b/src/qml/jit/qv4regalloc.cpp @@ -1575,7 +1575,7 @@ static void longestAvailableReg(int *nextUses, int nextUseCount, int ®, int & #define CALLOC_ON_STACK(ty, ptr, sz, val) \ Q_ASSERT(sz > 0); \ - ty *ptr = reinterpret_cast<ty *>(alloca(sizeof(ty) * (sz))); \ + Q_ALLOCA_VAR(ty, ptr, sizeof(ty) * (sz)); \ for (ty *it = ptr, *eit = ptr + (sz); it != eit; ++it) \ *it = val; diff --git a/src/qml/jit/qv4targetplatform_p.h b/src/qml/jit/qv4targetplatform_p.h index 725567fa05..fcc600eb2e 100644 --- a/src/qml/jit/qv4targetplatform_p.h +++ b/src/qml/jit/qv4targetplatform_p.h @@ -207,6 +207,7 @@ public: << RI(JSC::X86Registers::edx, QStringLiteral("rdx"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) << RI(JSC::X86Registers::r9, QStringLiteral("r9"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) << RI(JSC::X86Registers::r8, QStringLiteral("r8"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + // r11 is used as scratch register by the macro assembler << RI(JSC::X86Registers::r12, QStringLiteral("r12"), RI::RegularRegister, RI::CalleeSaved, RI::Predefined) << RI(JSC::X86Registers::r13, QStringLiteral("r13"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) << RI(JSC::X86Registers::r14, QStringLiteral("r14"), RI::RegularRegister, RI::CalleeSaved, RI::Predefined) @@ -265,10 +266,7 @@ public: using FPRegisterID = PlatformAssembler::FPRegisterID; using TrustedImm32 = PlatformAssembler::TrustedImm32; - // Register allocation is not (yet) supported on win64, because the ABI related stack handling - // is not completely implemented. Specifically, the saving of xmm registers, and the saving of - // incoming function parameters to the shadow space is missing. - enum { RegAllocIsSupported = 0 }; + enum { RegAllocIsSupported = 1 }; static const RegisterID FramePointerRegister = JSC::X86Registers::ebp; static const RegisterID StackPointerRegister = JSC::X86Registers::esp; @@ -283,16 +281,23 @@ public: { typedef RegisterInfo RI; static RegisterInformation info = RegisterInformation() - << RI(JSC::X86Registers::ebx, QStringLiteral("rbx"), RI::RegularRegister, RI::CalleeSaved, RI::Predefined) - << RI(JSC::X86Registers::edi, QStringLiteral("rdi"), RI::RegularRegister, RI::CalleeSaved, RI::Predefined) - << RI(JSC::X86Registers::esi, QStringLiteral("rsi"), RI::RegularRegister, RI::CalleeSaved, RI::Predefined) - << RI(JSC::X86Registers::edx, QStringLiteral("rdx"), RI::RegularRegister, RI::CallerSaved, RI::Predefined) - << RI(JSC::X86Registers::r9, QStringLiteral("r9"), RI::RegularRegister, RI::CallerSaved, RI::Predefined) - << RI(JSC::X86Registers::r8, QStringLiteral("r8"), RI::RegularRegister, RI::CallerSaved, RI::Predefined) + << RI(JSC::X86Registers::ebx, QStringLiteral("rbx"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::X86Registers::edi, QStringLiteral("rdi"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::X86Registers::esi, QStringLiteral("rsi"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::X86Registers::edx, QStringLiteral("rdx"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::X86Registers::r8, QStringLiteral("r8"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::X86Registers::r9, QStringLiteral("r9"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + // r11 is used as scratch register by the macro assembler << RI(JSC::X86Registers::r12, QStringLiteral("r12"), RI::RegularRegister, RI::CalleeSaved, RI::Predefined) - << RI(JSC::X86Registers::r13, QStringLiteral("r13"), RI::RegularRegister, RI::CalleeSaved, RI::Predefined) + << RI(JSC::X86Registers::r13, QStringLiteral("r13"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) << RI(JSC::X86Registers::r14, QStringLiteral("r14"), RI::RegularRegister, RI::CalleeSaved, RI::Predefined) - << RI(JSC::X86Registers::r15, QStringLiteral("r15"), RI::RegularRegister, RI::CalleeSaved, RI::Predefined) + << RI(JSC::X86Registers::r15, QStringLiteral("r15"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::X86Registers::xmm2, QStringLiteral("xmm2"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::X86Registers::xmm3, QStringLiteral("xmm3"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::X86Registers::xmm4, QStringLiteral("xmm4"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::X86Registers::xmm5, QStringLiteral("xmm5"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::X86Registers::xmm6, QStringLiteral("xmm6"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::X86Registers::xmm7, QStringLiteral("xmm7"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) ; return info; } @@ -311,7 +316,7 @@ public: }; Q_ASSERT(index >= 0 && index < RegisterArgumentCount); return regs[index]; - }; + } static const int StackAlignment = 16; static const int StackShadowSpace = 32; |