diff options
author | Erik Verbruggen <erik.verbruggen@digia.com> | 2014-05-22 14:31:03 +0200 |
---|---|---|
committer | Erik Verbruggen <erik.verbruggen@digia.com> | 2014-06-13 16:09:24 +0200 |
commit | 7fde8a8d20da7fa00d974286fa903b3fee76d466 (patch) | |
tree | ca3c873b1d8a96c4ea772c16f8f50b05a27107e8 /src/qml/jit | |
parent | e95fa10de29ca7c45abaf9bc1d5481dbc3bbd874 (diff) |
V4 JIT: use RegisterInfo in the register allocator.
Change-Id: Ia9faeb20b360f41d00f908132fd306e2d25c7574
Reviewed-by: Lars Knoll <lars.knoll@digia.com>
Diffstat (limited to 'src/qml/jit')
-rw-r--r-- | src/qml/jit/qv4isel_masm.cpp | 2 | ||||
-rw-r--r-- | src/qml/jit/qv4regalloc.cpp | 64 | ||||
-rw-r--r-- | src/qml/jit/qv4regalloc_p.h | 8 | ||||
-rw-r--r-- | src/qml/jit/qv4targetplatform_p.h | 26 |
4 files changed, 46 insertions, 54 deletions
diff --git a/src/qml/jit/qv4isel_masm.cpp b/src/qml/jit/qv4isel_masm.cpp index b9cbc72b7f..b35db9766b 100644 --- a/src/qml/jit/qv4isel_masm.cpp +++ b/src/qml/jit/qv4isel_masm.cpp @@ -225,7 +225,7 @@ void InstructionSelection::run(int functionIndex) static const bool withRegisterAllocator = qgetenv("QV4_NO_REGALLOC").isEmpty(); if (Assembler::RegAllocIsSupported && opt.isInSSA() && withRegisterAllocator) { - RegisterAllocator(Assembler::getIntRegisters(), Assembler::getFpRegisters()).run(_function, opt); + RegisterAllocator(Assembler::getRegisterInfo()).run(_function, opt); } else { if (opt.isInSSA()) // No register allocator available for this platform, or env. var was set, so: diff --git a/src/qml/jit/qv4regalloc.cpp b/src/qml/jit/qv4regalloc.cpp index b7fdeaa77f..e21676e520 100644 --- a/src/qml/jit/qv4regalloc.cpp +++ b/src/qml/jit/qv4regalloc.cpp @@ -743,8 +743,8 @@ class ResolutionPhase: protected StmtVisitor, protected ExprVisitor { IR::Function *_function; const std::vector<int> &_assignedSpillSlots; QHash<IR::Temp, const LifeTimeInterval *> _intervalForTemp; - const QVector<int> &_intRegs; - const QVector<int> &_fpRegs; + const QVector<const RegisterInfo *> &_intRegs; + const QVector<const RegisterInfo *> &_fpRegs; Stmt *_currentStmt; QVector<Move *> _loads; @@ -758,8 +758,8 @@ public: const LifeTimeIntervals::Ptr &intervals, IR::Function *function, const std::vector<int> &assignedSpillSlots, - const QVector<int> &intRegs, - const QVector<int> &fpRegs) + const QVector<const RegisterInfo *> &intRegs, + const QVector<const RegisterInfo *> &fpRegs) : _intervals(intervals) , _function(function) , _assignedSpillSlots(assignedSpillSlots) @@ -857,10 +857,11 @@ private: if (i->reg() == LifeTimeInterval::InvalidRegister) return; - int pReg = platformRegister(*i); + const RegisterInfo *pReg = platformRegister(*i); + Q_ASSERT(pReg); int spillSlot = _assignedSpillSlots[i->temp().index]; if (spillSlot != RegisterAllocator::InvalidSpillSlot) - _stores.append(generateSpill(spillSlot, i->temp().type, pReg)); + _stores.append(generateSpill(spillSlot, i->temp().type, pReg->reg<int>())); } void addNewIntervals(int position) @@ -950,8 +951,7 @@ private: if (it2->temp() == *t && it2->reg() != LifeTimeInterval::InvalidRegister && it2->covers(predecessorEnd)) { - moveFrom = createTemp(Temp::PhysicalRegister, - platformRegister(*it2), t->type); + moveFrom = createPhysicalRegister(it2, t->type); break; } } @@ -966,8 +966,7 @@ private: if (predIt->temp() == it->temp()) { if (predIt->reg() != LifeTimeInterval::InvalidRegister && predIt->covers(predecessorEnd)) { - moveFrom = createTemp(Temp::PhysicalRegister, platformRegister(*predIt), - predIt->temp().type); + moveFrom = createPhysicalRegister(predIt, predIt->temp().type); } else { int spillSlot = _assignedSpillSlots[predIt->temp().index]; if (spillSlot != -1) @@ -1023,7 +1022,7 @@ private: continue; // it has a life-time hole here. moveTo = createTemp(Temp::StackSlot, spillSlot, it->temp().type); } else { - moveTo = createTemp(Temp::PhysicalRegister, platformRegister(*it), it->temp().type); + moveTo = createPhysicalRegister(it, it->temp().type); } // add move to mapping @@ -1057,12 +1056,19 @@ private: return t; } - int platformRegister(const LifeTimeInterval &i) const + Temp *createPhysicalRegister(const LifeTimeInterval *i, Type type) const + { + const RegisterInfo *ri = platformRegister(*i); + Q_ASSERT(ri); + return createTemp(Temp::PhysicalRegister, ri->reg<int>(), type); + } + + const RegisterInfo *platformRegister(const LifeTimeInterval &i) const { if (i.isFP()) - return _fpRegs.value(i.reg(), -1); + return _fpRegs.value(i.reg(), 0); else - return _intRegs.value(i.reg(), -1); + return _intRegs.value(i.reg(), 0); } Move *generateSpill(int spillSlot, Type type, int pReg) const @@ -1097,16 +1103,18 @@ protected: if (_currentStmt != 0 && i->start() == usePosition(_currentStmt)) { Q_ASSERT(i->isSplitFromInterval()); - int pReg = platformRegister(*i); - _loads.append(generateUnspill(i->temp(), pReg)); + const RegisterInfo *pReg = platformRegister(*i); + Q_ASSERT(pReg); + _loads.append(generateUnspill(i->temp(), pReg->reg<int>())); } if (i->reg() != LifeTimeInterval::InvalidRegister && (i->covers(defPosition(_currentStmt)) || i->covers(usePosition(_currentStmt)))) { - int pReg = platformRegister(*i); + const RegisterInfo *pReg = platformRegister(*i); + Q_ASSERT(pReg); t->kind = Temp::PhysicalRegister; - t->index = pReg; + t->index = pReg->reg<unsigned>(); } else { int stackSlot = _assignedSpillSlots[t->index]; Q_ASSERT(stackSlot >= 0); @@ -1160,13 +1168,21 @@ protected: }; } // anonymous namespace -RegisterAllocator::RegisterAllocator(const QVector<int> &normalRegisters, const QVector<int> &fpRegisters) - : _normalRegisters(normalRegisters) - , _fpRegisters(fpRegisters) +RegisterAllocator::RegisterAllocator(const QV4::JIT::RegisterInformation ®isterInformation) + : _registerInformation(registerInformation) { - Q_ASSERT(normalRegisters.size() >= 2); - Q_ASSERT(fpRegisters.size() >= 2); - _active.reserve((normalRegisters.size() + fpRegisters.size()) * 2); + for (int i = 0, ei = registerInformation.size(); i != ei; ++i) { + const RegisterInfo ®Info = registerInformation.at(i); + if (regInfo.useForRegAlloc()) { + if (regInfo.isRegularRegister()) + _normalRegisters.append(®Info); + else + _fpRegisters.append(®Info); + } + } + Q_ASSERT(_normalRegisters.size() >= 2); + Q_ASSERT(_fpRegisters.size() >= 2); + _active.reserve((_normalRegisters.size() + _fpRegisters.size()) * 2); _inactive.reserve(_active.size()); } diff --git a/src/qml/jit/qv4regalloc_p.h b/src/qml/jit/qv4regalloc_p.h index 9679b5f072..9172b5dfd8 100644 --- a/src/qml/jit/qv4regalloc_p.h +++ b/src/qml/jit/qv4regalloc_p.h @@ -44,6 +44,7 @@ #include "qv4global_p.h" #include "qv4isel_p.h" #include "qv4ssa_p.h" +#include "qv4registerinfo_p.h" #include <config.h> @@ -58,8 +59,9 @@ class RegisterAllocator { typedef IR::LifeTimeInterval LifeTimeInterval; - QVector<int> _normalRegisters; - QVector<int> _fpRegisters; + const RegisterInformation &_registerInformation; + QVector<const RegisterInfo *> _normalRegisters; + QVector<const RegisterInfo *> _fpRegisters; QScopedPointer<RegAllocInfo> _info; QVector<LifeTimeInterval *> _fixedRegisterRanges, _fixedFPRegisterRanges; @@ -77,7 +79,7 @@ class RegisterAllocator public: enum { InvalidSpillSlot = -1 }; - RegisterAllocator(const QVector<int> &normalRegisters, const QVector<int> &fpRegisters); + RegisterAllocator(const RegisterInformation ®isterInformation); ~RegisterAllocator(); void run(IR::Function *function, const IR::Optimizer &opt); diff --git a/src/qml/jit/qv4targetplatform_p.h b/src/qml/jit/qv4targetplatform_p.h index c8e1f74611..1f08a0df2b 100644 --- a/src/qml/jit/qv4targetplatform_p.h +++ b/src/qml/jit/qv4targetplatform_p.h @@ -363,32 +363,6 @@ public: // utility functions { return getCalleeSavedRegisters().size(); } - - static QVector<int> getIntRegisters() - { - // TODO: change the register allocator to cope with caller/callee saved registers - static QVector<int> intRegs; - if (intRegs.isEmpty()) { - foreach (const RegisterInfo &info, getRegisterInfo()) - if (info.isRegularRegister() && info.useForRegAlloc()) - intRegs.append(info.reg<int>()); - } - - return intRegs; - } - - static QVector<int> getFpRegisters() - { - // TODO: change the register allocator to cope with caller/callee saved registers - static QVector<int> fpRegs; - if (fpRegs.isEmpty()) { - foreach (const RegisterInfo &info, getRegisterInfo()) - if (info.isFloatingPoint() && info.useForRegAlloc()) - fpRegs.append(info.reg<int>()); - } - - return fpRegs; - } }; } // JIT namespace |