diff options
author | Lars Knoll <lars.knoll@digia.com> | 2014-02-14 13:58:40 +0100 |
---|---|---|
committer | The Qt Project <gerrit-noreply@qt-project.org> | 2014-02-23 09:39:52 +0100 |
commit | cad3ba5fd44c09455c2492548865a8743386ea18 (patch) | |
tree | 9cbd5d37b414f0585dac61feac65f542e40c143e /src/qml/jit | |
parent | 7dbb49bdec6e74f9d1eb096d15bdeea0881c3704 (diff) |
Clean up our internal namespaces
QQmlJS::MASM -> QV4::JIT
QQmlJS::V4IR -> QV4::IR
Change-Id: I707e8990459114a699c200fe3c22cec3c8df1afc
Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
Diffstat (limited to 'src/qml/jit')
-rw-r--r-- | src/qml/jit/qv4assembler.cpp | 81 | ||||
-rw-r--r-- | src/qml/jit/qv4assembler_p.h | 182 | ||||
-rw-r--r-- | src/qml/jit/qv4binop.cpp | 139 | ||||
-rw-r--r-- | src/qml/jit/qv4binop_p.h | 14 | ||||
-rw-r--r-- | src/qml/jit/qv4isel_masm.cpp | 493 | ||||
-rw-r--r-- | src/qml/jit/qv4isel_masm_p.h | 164 | ||||
-rw-r--r-- | src/qml/jit/qv4regalloc.cpp | 140 | ||||
-rw-r--r-- | src/qml/jit/qv4regalloc_p.h | 22 | ||||
-rw-r--r-- | src/qml/jit/qv4unop.cpp | 49 | ||||
-rw-r--r-- | src/qml/jit/qv4unop_p.h | 22 |
10 files changed, 647 insertions, 659 deletions
diff --git a/src/qml/jit/qv4assembler.cpp b/src/qml/jit/qv4assembler.cpp index 0cf2b79ac8..0cede2a2f1 100644 --- a/src/qml/jit/qv4assembler.cpp +++ b/src/qml/jit/qv4assembler.cpp @@ -62,9 +62,8 @@ # include <udis86.h> #endif -using namespace QQmlJS; -using namespace QQmlJS::MASM; using namespace QV4; +using namespace QV4::JIT; CompilationUnit::~CompilationUnit() { @@ -142,7 +141,7 @@ const int Assembler::calleeSavedRegisterCount = sizeof(calleeSavedRegisters) / s const Assembler::VoidType Assembler::Void; -Assembler::Assembler(InstructionSelection *isel, V4IR::Function* function, QV4::ExecutableAllocator *executableAllocator, +Assembler::Assembler(InstructionSelection *isel, IR::Function* function, QV4::ExecutableAllocator *executableAllocator, int maxArgCountForBuiltins) : _stackLayout(function, maxArgCountForBuiltins) , _constTable(this) @@ -153,14 +152,14 @@ Assembler::Assembler(InstructionSelection *isel, V4IR::Function* function, QV4:: { } -void Assembler::registerBlock(V4IR::BasicBlock* block, V4IR::BasicBlock *nextBlock) +void Assembler::registerBlock(IR::BasicBlock* block, IR::BasicBlock *nextBlock) { _addrs[block] = label(); catchBlock = block->catchBlock; _nextBlock = nextBlock; } -void Assembler::jumpToBlock(V4IR::BasicBlock* current, V4IR::BasicBlock *target) +void Assembler::jumpToBlock(IR::BasicBlock* current, IR::BasicBlock *target) { Q_UNUSED(current); @@ -168,7 +167,7 @@ void Assembler::jumpToBlock(V4IR::BasicBlock* current, V4IR::BasicBlock *target) _patches[target].append(jump()); } -void Assembler::addPatch(V4IR::BasicBlock* targetBlock, Jump targetJump) +void Assembler::addPatch(IR::BasicBlock* targetBlock, Jump targetJump) { _patches[targetBlock].append(targetJump); } @@ -181,20 +180,20 @@ void Assembler::addPatch(DataLabelPtr patch, Label target) _dataLabelPatches.append(p); } -void Assembler::addPatch(DataLabelPtr patch, V4IR::BasicBlock *target) +void Assembler::addPatch(DataLabelPtr patch, IR::BasicBlock *target) { _labelPatches[target].append(patch); } -void Assembler::generateCJumpOnNonZero(RegisterID reg, V4IR::BasicBlock *currentBlock, - V4IR::BasicBlock *trueBlock, V4IR::BasicBlock *falseBlock) +void Assembler::generateCJumpOnNonZero(RegisterID reg, IR::BasicBlock *currentBlock, + IR::BasicBlock *trueBlock, IR::BasicBlock *falseBlock) { generateCJumpOnCompare(NotEqual, reg, TrustedImm32(0), currentBlock, trueBlock, falseBlock); } void Assembler::generateCJumpOnCompare(RelationalCondition cond, RegisterID left,TrustedImm32 right, - V4IR::BasicBlock *currentBlock, V4IR::BasicBlock *trueBlock, - V4IR::BasicBlock *falseBlock) + IR::BasicBlock *currentBlock, IR::BasicBlock *trueBlock, + IR::BasicBlock *falseBlock) { if (trueBlock == _nextBlock) { Jump target = branch32(invert(cond), left, right); @@ -207,8 +206,8 @@ void Assembler::generateCJumpOnCompare(RelationalCondition cond, RegisterID left } void Assembler::generateCJumpOnCompare(RelationalCondition cond, RegisterID left, RegisterID right, - V4IR::BasicBlock *currentBlock, V4IR::BasicBlock *trueBlock, - V4IR::BasicBlock *falseBlock) + IR::BasicBlock *currentBlock, IR::BasicBlock *trueBlock, + IR::BasicBlock *falseBlock) { if (trueBlock == _nextBlock) { Jump target = branch32(invert(cond), left, right); @@ -220,7 +219,7 @@ void Assembler::generateCJumpOnCompare(RelationalCondition cond, RegisterID left } } -Assembler::Pointer Assembler::loadTempAddress(RegisterID baseReg, V4IR::Temp *t) +Assembler::Pointer Assembler::loadTempAddress(RegisterID baseReg, IR::Temp *t) { int32_t offset = 0; int scope = t->scope; @@ -235,17 +234,17 @@ Assembler::Pointer Assembler::loadTempAddress(RegisterID baseReg, V4IR::Temp *t) } } switch (t->kind) { - case V4IR::Temp::Formal: - case V4IR::Temp::ScopedFormal: { + case IR::Temp::Formal: + case IR::Temp::ScopedFormal: { loadPtr(Address(context, qOffsetOf(ExecutionContext, callData)), baseReg); offset = sizeof(CallData) + (t->index - 1) * sizeof(Value); } break; - case V4IR::Temp::Local: - case V4IR::Temp::ScopedLocal: { + case IR::Temp::Local: + case IR::Temp::ScopedLocal: { loadPtr(Address(context, qOffsetOf(CallContext, locals)), baseReg); offset = t->index * sizeof(Value); } break; - case V4IR::Temp::StackSlot: { + case IR::Temp::StackSlot: { return stackSlotPointer(t); } break; default: @@ -270,7 +269,7 @@ void Assembler::loadStringRef(RegisterID reg, const QString &string) addPtr(TrustedImmPtr(id * sizeof(QV4::StringValue)), reg); } -void Assembler::storeValue(QV4::Primitive value, V4IR::Temp* destination) +void Assembler::storeValue(QV4::Primitive value, IR::Temp* destination) { Address addr = loadTempAddress(ScratchRegister, destination); storeValue(value, addr); @@ -329,7 +328,7 @@ void Assembler::leaveStandardStackFrame() #define NULL_OP \ { 0, 0, 0, 0, 0 } -const Assembler::BinaryOperationInfo Assembler::binaryOperations[QQmlJS::V4IR::LastAluOp + 1] = { +const Assembler::BinaryOperationInfo Assembler::binaryOperations[IR::LastAluOp + 1] = { NULL_OP, // OpInvalid NULL_OP, // OpIfTrue NULL_OP, // OpNot @@ -374,32 +373,32 @@ const Assembler::BinaryOperationInfo Assembler::binaryOperations[QQmlJS::V4IR::L // Try to load the source expression into the destination FP register. This assumes that two // general purpose (integer) registers are available: the ScratchRegister and the // ReturnValueRegister. It returns a Jump if no conversion can be performed. -Assembler::Jump Assembler::genTryDoubleConversion(V4IR::Expr *src, Assembler::FPRegisterID dest) +Assembler::Jump Assembler::genTryDoubleConversion(IR::Expr *src, Assembler::FPRegisterID dest) { switch (src->type) { - case V4IR::DoubleType: + case IR::DoubleType: moveDouble(toDoubleRegister(src, dest), dest); return Assembler::Jump(); - case V4IR::SInt32Type: + case IR::SInt32Type: convertInt32ToDouble(toInt32Register(src, Assembler::ScratchRegister), dest); return Assembler::Jump(); - case V4IR::UInt32Type: + case IR::UInt32Type: convertUInt32ToDouble(toUInt32Register(src, Assembler::ScratchRegister), dest, Assembler::ReturnValueRegister); return Assembler::Jump(); - case V4IR::BoolType: + case IR::BoolType: // TODO? return jump(); default: break; } - V4IR::Temp *sourceTemp = src->asTemp(); + IR::Temp *sourceTemp = src->asTemp(); Q_ASSERT(sourceTemp); // It's not a number type, so it cannot be in a register. - Q_ASSERT(sourceTemp->kind != V4IR::Temp::PhysicalRegister || sourceTemp->type == V4IR::BoolType); + Q_ASSERT(sourceTemp->kind != IR::Temp::PhysicalRegister || sourceTemp->type == IR::BoolType); Assembler::Pointer tagAddr = loadTempAddress(Assembler::ScratchRegister, sourceTemp); tagAddr.offset += 4; @@ -430,17 +429,17 @@ Assembler::Jump Assembler::genTryDoubleConversion(V4IR::Expr *src, Assembler::FP #ifndef QT_NO_DEBUG namespace { -inline bool isPregOrConst(V4IR::Expr *e) +inline bool isPregOrConst(IR::Expr *e) { - if (V4IR::Temp *t = e->asTemp()) - return t->kind == V4IR::Temp::PhysicalRegister; + if (IR::Temp *t = e->asTemp()) + return t->kind == IR::Temp::PhysicalRegister; return e->asConst() != 0; } } // anonymous namespace #endif -Assembler::Jump Assembler::branchDouble(bool invertCondition, V4IR::AluOp op, - V4IR::Expr *left, V4IR::Expr *right) +Assembler::Jump Assembler::branchDouble(bool invertCondition, IR::AluOp op, + IR::Expr *left, IR::Expr *right) { Q_ASSERT(isPregOrConst(left)); Q_ASSERT(isPregOrConst(right)); @@ -448,14 +447,14 @@ Assembler::Jump Assembler::branchDouble(bool invertCondition, V4IR::AluOp op, Assembler::DoubleCondition cond; switch (op) { - case V4IR::OpGt: cond = Assembler::DoubleGreaterThan; break; - case V4IR::OpLt: cond = Assembler::DoubleLessThan; break; - case V4IR::OpGe: cond = Assembler::DoubleGreaterThanOrEqual; break; - case V4IR::OpLe: cond = Assembler::DoubleLessThanOrEqual; break; - case V4IR::OpEqual: - case V4IR::OpStrictEqual: cond = Assembler::DoubleEqual; break; - case V4IR::OpNotEqual: - case V4IR::OpStrictNotEqual: cond = Assembler::DoubleNotEqualOrUnordered; break; // No, the inversion of DoubleEqual is NOT DoubleNotEqual. + case IR::OpGt: cond = Assembler::DoubleGreaterThan; break; + case IR::OpLt: cond = Assembler::DoubleLessThan; break; + case IR::OpGe: cond = Assembler::DoubleGreaterThanOrEqual; break; + case IR::OpLe: cond = Assembler::DoubleLessThanOrEqual; break; + case IR::OpEqual: + case IR::OpStrictEqual: cond = Assembler::DoubleEqual; break; + case IR::OpNotEqual: + case IR::OpStrictNotEqual: cond = Assembler::DoubleNotEqualOrUnordered; break; // No, the inversion of DoubleEqual is NOT DoubleNotEqual. default: Q_UNREACHABLE(); } diff --git a/src/qml/jit/qv4assembler_p.h b/src/qml/jit/qv4assembler_p.h index daa7816a2d..dd1209a026 100644 --- a/src/qml/jit/qv4assembler_p.h +++ b/src/qml/jit/qv4assembler_p.h @@ -60,8 +60,8 @@ QT_BEGIN_NAMESPACE -namespace QQmlJS { -namespace MASM { +namespace QV4 { +namespace JIT { #define OP(op) \ { isel_stringIfy(op), op, 0, 0, 0 } @@ -128,7 +128,7 @@ struct ExceptionCheck<void (*)(QV4::NoThrowContext *, A, B, C)> { class Assembler : public JSC::MacroAssembler { public: - Assembler(InstructionSelection *isel, V4IR::Function* function, QV4::ExecutableAllocator *executableAllocator, + Assembler(InstructionSelection *isel, IR::Function* function, QV4::ExecutableAllocator *executableAllocator, int maxArgCountForBuiltins); #if CPU(X86) @@ -317,7 +317,7 @@ public: class StackLayout { public: - StackLayout(V4IR::Function *function, int maxArgCountForBuiltins) + StackLayout(IR::Function *function, int maxArgCountForBuiltins) : calleeSavedRegCount(Assembler::calleeSavedRegisterCount + 1) , maxOutgoingArgumentCount(function->maxNumberOfArguments) , localCount(function->tempCount) @@ -427,7 +427,7 @@ public: ConstantTable(Assembler *as): _as(as) {} int add(const QV4::Primitive &v); - ImplicitAddress loadValueAddress(V4IR::Const *c, RegisterID baseReg); + ImplicitAddress loadValueAddress(IR::Const *c, RegisterID baseReg); ImplicitAddress loadValueAddress(const QV4::Primitive &v, RegisterID baseReg); void finalize(JSC::LinkBuffer &linkBuffer, InstructionSelection *isel); @@ -448,23 +448,23 @@ public: const char* functionName; }; struct PointerToValue { - PointerToValue(V4IR::Expr *value) + PointerToValue(IR::Expr *value) : value(value) {} - V4IR::Expr *value; + IR::Expr *value; }; struct PointerToString { explicit PointerToString(const QString &string) : string(string) {} QString string; }; struct Reference { - Reference(V4IR::Temp *value) : value(value) {} - V4IR::Temp *value; + Reference(IR::Temp *value) : value(value) {} + IR::Temp *value; }; struct ReentryBlock { - ReentryBlock(V4IR::BasicBlock *b) : block(b) {} - V4IR::BasicBlock *block; + ReentryBlock(IR::BasicBlock *b) : block(b) {} + IR::BasicBlock *block; }; void callAbsolute(const char* functionName, FunctionPtr function) { @@ -484,29 +484,29 @@ public: call(relativeCall.addr); } - void registerBlock(V4IR::BasicBlock*, V4IR::BasicBlock *nextBlock); - V4IR::BasicBlock *nextBlock() const { return _nextBlock; } - void jumpToBlock(V4IR::BasicBlock* current, V4IR::BasicBlock *target); - void addPatch(V4IR::BasicBlock* targetBlock, Jump targetJump); + void registerBlock(IR::BasicBlock*, IR::BasicBlock *nextBlock); + IR::BasicBlock *nextBlock() const { return _nextBlock; } + void jumpToBlock(IR::BasicBlock* current, IR::BasicBlock *target); + void addPatch(IR::BasicBlock* targetBlock, Jump targetJump); void addPatch(DataLabelPtr patch, Label target); - void addPatch(DataLabelPtr patch, V4IR::BasicBlock *target); - void generateCJumpOnNonZero(RegisterID reg, V4IR::BasicBlock *currentBlock, - V4IR::BasicBlock *trueBlock, V4IR::BasicBlock *falseBlock); + void addPatch(DataLabelPtr patch, IR::BasicBlock *target); + void generateCJumpOnNonZero(RegisterID reg, IR::BasicBlock *currentBlock, + IR::BasicBlock *trueBlock, IR::BasicBlock *falseBlock); void generateCJumpOnCompare(RelationalCondition cond, RegisterID left, TrustedImm32 right, - V4IR::BasicBlock *currentBlock, V4IR::BasicBlock *trueBlock, - V4IR::BasicBlock *falseBlock); + IR::BasicBlock *currentBlock, IR::BasicBlock *trueBlock, + IR::BasicBlock *falseBlock); void generateCJumpOnCompare(RelationalCondition cond, RegisterID left, RegisterID right, - V4IR::BasicBlock *currentBlock, V4IR::BasicBlock *trueBlock, - V4IR::BasicBlock *falseBlock); - Jump genTryDoubleConversion(V4IR::Expr *src, Assembler::FPRegisterID dest); - Assembler::Jump branchDouble(bool invertCondition, V4IR::AluOp op, V4IR::Expr *left, V4IR::Expr *right); + IR::BasicBlock *currentBlock, IR::BasicBlock *trueBlock, + IR::BasicBlock *falseBlock); + Jump genTryDoubleConversion(IR::Expr *src, Assembler::FPRegisterID dest); + Assembler::Jump branchDouble(bool invertCondition, IR::AluOp op, IR::Expr *left, IR::Expr *right); - Pointer loadTempAddress(RegisterID baseReg, V4IR::Temp *t); + Pointer loadTempAddress(RegisterID baseReg, IR::Temp *t); Pointer loadStringAddress(RegisterID reg, const QString &string); void loadStringRef(RegisterID reg, const QString &string); - Pointer stackSlotPointer(V4IR::Temp *t) const + Pointer stackSlotPointer(IR::Temp *t) const { - Q_ASSERT(t->kind == V4IR::Temp::StackSlot); + Q_ASSERT(t->kind == IR::Temp::StackSlot); Q_ASSERT(t->scope == 0); return Pointer(_stackLayout.stackSlotPointer(t->index)); @@ -517,20 +517,20 @@ public: { if (!arg.value) return; - if (V4IR::Temp *t = arg.value->asTemp()) { - if (t->kind == V4IR::Temp::PhysicalRegister) { + if (IR::Temp *t = arg.value->asTemp()) { + if (t->kind == IR::Temp::PhysicalRegister) { Pointer addr(_stackLayout.savedRegPointer(argumentNumber)); switch (t->type) { - case V4IR::BoolType: + case IR::BoolType: storeBool((RegisterID) t->index, addr); break; - case V4IR::SInt32Type: + case IR::SInt32Type: storeInt32((RegisterID) t->index, addr); break; - case V4IR::UInt32Type: + case IR::UInt32Type: storeUInt32((RegisterID) t->index, addr); break; - case V4IR::DoubleType: + case IR::DoubleType: storeDouble((FPRegisterID) t->index, addr); break; default: @@ -596,7 +596,7 @@ public: } #ifdef VALUE_FITS_IN_REGISTER - void loadArgumentInRegister(V4IR::Temp* temp, RegisterID dest, int argumentNumber) + void loadArgumentInRegister(IR::Temp* temp, RegisterID dest, int argumentNumber) { Q_UNUSED(argumentNumber); @@ -609,7 +609,7 @@ public: } } - void loadArgumentInRegister(V4IR::Const* c, RegisterID dest, int argumentNumber) + void loadArgumentInRegister(IR::Const* c, RegisterID dest, int argumentNumber) { Q_UNUSED(argumentNumber); @@ -617,7 +617,7 @@ public: move(TrustedImm64(v.val), dest); } - void loadArgumentInRegister(V4IR::Expr* expr, RegisterID dest, int argumentNumber) + void loadArgumentInRegister(IR::Expr* expr, RegisterID dest, int argumentNumber) { Q_UNUSED(argumentNumber); @@ -633,7 +633,7 @@ public: } } #else - void loadArgumentInRegister(V4IR::Expr*, RegisterID) + void loadArgumentInRegister(IR::Expr*, RegisterID) { assert(!"unimplemented: expression in loadArgument"); } @@ -701,15 +701,15 @@ public: } #endif - void storeReturnValue(V4IR::Temp *temp) + void storeReturnValue(IR::Temp *temp) { if (!temp) return; - if (temp->kind == V4IR::Temp::PhysicalRegister) { - if (temp->type == V4IR::DoubleType) + if (temp->kind == IR::Temp::PhysicalRegister) { + if (temp->type == IR::DoubleType) storeReturnValue((FPRegisterID) temp->index); - else if (temp->type == V4IR::UInt32Type) + else if (temp->type == IR::UInt32Type) storeUInt32ReturnValue((RegisterID) temp->index); else storeReturnValue((RegisterID) temp->index); @@ -804,9 +804,9 @@ public: poke(TrustedImmPtr(name), StackSlot); } - void loadDouble(V4IR::Temp* temp, FPRegisterID dest) + void loadDouble(IR::Temp* temp, FPRegisterID dest) { - if (temp->kind == V4IR::Temp::PhysicalRegister) { + if (temp->kind == IR::Temp::PhysicalRegister) { moveDouble((FPRegisterID) temp->index, dest); return; } @@ -814,9 +814,9 @@ public: loadDouble(ptr, dest); } - void storeDouble(FPRegisterID source, V4IR::Temp* temp) + void storeDouble(FPRegisterID source, IR::Temp* temp) { - if (temp->kind == V4IR::Temp::PhysicalRegister) { + if (temp->kind == IR::Temp::PhysicalRegister) { moveDouble(source, (FPRegisterID) temp->index); return; } @@ -856,12 +856,12 @@ public: template <typename Result, typename Source> void copyValue(Result result, Source source); template <typename Result> - void copyValue(Result result, V4IR::Expr* source); + void copyValue(Result result, IR::Expr* source); // The scratch register is used to calculate the temp address for the source. - void memcopyValue(Pointer target, V4IR::Temp *sourceTemp, RegisterID scratchRegister) + void memcopyValue(Pointer target, IR::Temp *sourceTemp, RegisterID scratchRegister) { - Q_ASSERT(sourceTemp->kind != V4IR::Temp::PhysicalRegister); + Q_ASSERT(sourceTemp->kind != IR::Temp::PhysicalRegister); Q_ASSERT(target.base != scratchRegister); JSC::MacroAssembler::loadDouble(loadTempAddress(scratchRegister, sourceTemp), FPGpr0); JSC::MacroAssembler::storeDouble(FPGpr0, target); @@ -885,7 +885,7 @@ public: #endif } - void storeValue(QV4::Primitive value, V4IR::Temp* temp); + void storeValue(QV4::Primitive value, IR::Temp* temp); void enterStandardStackFrame(); void leaveStandardStackFrame(); @@ -1042,8 +1042,8 @@ public: ImmRegBinOp inlineImmRegOp; }; - static const BinaryOperationInfo binaryOperations[QQmlJS::V4IR::LastAluOp + 1]; - static const BinaryOperationInfo &binaryOperation(V4IR::AluOp operation) + static const BinaryOperationInfo binaryOperations[IR::LastAluOp + 1]; + static const BinaryOperationInfo &binaryOperation(IR::AluOp operation) { return binaryOperations[operation]; } Jump inline_add32(Address addr, RegisterID reg) @@ -1187,9 +1187,9 @@ public: return Jump(); } - Pointer toAddress(RegisterID tmpReg, V4IR::Expr *e, int offset) + Pointer toAddress(RegisterID tmpReg, IR::Expr *e, int offset) { - if (V4IR::Const *c = e->asConst()) { + if (IR::Const *c = e->asConst()) { Address addr = _stackLayout.savedRegPointer(offset); Address tagAddr = addr; tagAddr.offset += 4; @@ -1200,9 +1200,9 @@ public: return Pointer(addr); } - V4IR::Temp *t = e->asTemp(); + IR::Temp *t = e->asTemp(); Q_ASSERT(t); - if (t->kind != V4IR::Temp::PhysicalRegister) + if (t->kind != IR::Temp::PhysicalRegister) return loadTempAddress(tmpReg, t); @@ -1221,9 +1221,9 @@ public: move(src, dest); } - void storeBool(RegisterID reg, V4IR::Temp *target) + void storeBool(RegisterID reg, IR::Temp *target) { - if (target->kind == V4IR::Temp::PhysicalRegister) { + if (target->kind == IR::Temp::PhysicalRegister) { move(reg, (RegisterID) target->index); } else { Pointer addr = loadTempAddress(ScratchRegister, target); @@ -1231,9 +1231,9 @@ public: } } - void storeBool(bool value, V4IR::Temp *target) { + void storeBool(bool value, IR::Temp *target) { TrustedImm32 trustedValue(value ? 1 : 0); - if (target->kind == V4IR::Temp::PhysicalRegister) { + if (target->kind == IR::Temp::PhysicalRegister) { move(trustedValue, (RegisterID) target->index); } else { move(trustedValue, ScratchRegister); @@ -1253,9 +1253,9 @@ public: store32(TrustedImm32(QV4::Primitive::fromInt32(0).tag), addr); } - void storeInt32(RegisterID reg, V4IR::Temp *target) + void storeInt32(RegisterID reg, IR::Temp *target) { - if (target->kind == V4IR::Temp::PhysicalRegister) { + if (target->kind == IR::Temp::PhysicalRegister) { move(reg, (RegisterID) target->index); } else { Pointer addr = loadTempAddress(ScratchRegister, target); @@ -1280,9 +1280,9 @@ public: done.link(this); } - void storeUInt32(RegisterID reg, V4IR::Temp *target) + void storeUInt32(RegisterID reg, IR::Temp *target) { - if (target->kind == V4IR::Temp::PhysicalRegister) { + if (target->kind == IR::Temp::PhysicalRegister) { move(reg, (RegisterID) target->index); } else { Pointer addr = loadTempAddress(ScratchRegister, target); @@ -1290,9 +1290,9 @@ public: } } - FPRegisterID toDoubleRegister(V4IR::Expr *e, FPRegisterID target = FPGpr0) + FPRegisterID toDoubleRegister(IR::Expr *e, FPRegisterID target = FPGpr0) { - if (V4IR::Const *c = e->asConst()) { + if (IR::Const *c = e->asConst()) { #if QT_POINTER_SIZE == 8 union { double d; @@ -1307,30 +1307,30 @@ public: return target; } - V4IR::Temp *t = e->asTemp(); + IR::Temp *t = e->asTemp(); Q_ASSERT(t); - if (t->kind == V4IR::Temp::PhysicalRegister) + if (t->kind == IR::Temp::PhysicalRegister) return (FPRegisterID) t->index; loadDouble(t, target); return target; } - RegisterID toBoolRegister(V4IR::Expr *e, RegisterID scratchReg) + RegisterID toBoolRegister(IR::Expr *e, RegisterID scratchReg) { return toInt32Register(e, scratchReg); } - RegisterID toInt32Register(V4IR::Expr *e, RegisterID scratchReg) + RegisterID toInt32Register(IR::Expr *e, RegisterID scratchReg) { - if (V4IR::Const *c = e->asConst()) { + if (IR::Const *c = e->asConst()) { move(TrustedImm32(convertToValue(c).int_32), scratchReg); return scratchReg; } - V4IR::Temp *t = e->asTemp(); + IR::Temp *t = e->asTemp(); Q_ASSERT(t); - if (t->kind == V4IR::Temp::PhysicalRegister) + if (t->kind == IR::Temp::PhysicalRegister) return (RegisterID) t->index; return toInt32Register(loadTempAddress(scratchReg, t), scratchReg); @@ -1342,16 +1342,16 @@ public: return scratchReg; } - RegisterID toUInt32Register(V4IR::Expr *e, RegisterID scratchReg) + RegisterID toUInt32Register(IR::Expr *e, RegisterID scratchReg) { - if (V4IR::Const *c = e->asConst()) { + if (IR::Const *c = e->asConst()) { move(TrustedImm32(unsigned(c->value)), scratchReg); return scratchReg; } - V4IR::Temp *t = e->asTemp(); + IR::Temp *t = e->asTemp(); Q_ASSERT(t); - if (t->kind == V4IR::Temp::PhysicalRegister) + if (t->kind == IR::Temp::PhysicalRegister) return (RegisterID) t->index; return toUInt32Register(loadTempAddress(scratchReg, t), scratchReg); @@ -1390,14 +1390,14 @@ public: ConstantTable &constantTable() { return _constTable; } Label exceptionReturnLabel; - V4IR::BasicBlock * catchBlock; + IR::BasicBlock * catchBlock; QVector<Jump> exceptionPropagationJumps; private: const StackLayout _stackLayout; ConstantTable _constTable; - V4IR::Function *_function; - QHash<V4IR::BasicBlock *, Label> _addrs; - QHash<V4IR::BasicBlock *, QVector<Jump> > _patches; + IR::Function *_function; + QHash<IR::BasicBlock *, Label> _addrs; + QHash<IR::BasicBlock *, QVector<Jump> > _patches; QList<CallToLink> _callsToLink; struct DataLabelPatch { @@ -1406,8 +1406,8 @@ private: }; QList<DataLabelPatch> _dataLabelPatches; - QHash<V4IR::BasicBlock *, QVector<DataLabelPtr> > _labelPatches; - V4IR::BasicBlock *_nextBlock; + QHash<IR::BasicBlock *, QVector<DataLabelPtr> > _labelPatches; + IR::BasicBlock *_nextBlock; QV4::ExecutableAllocator *_executableAllocator; InstructionSelection *_isel; @@ -1428,20 +1428,20 @@ void Assembler::copyValue(Result result, Source source) } template <typename Result> -void Assembler::copyValue(Result result, V4IR::Expr* source) +void Assembler::copyValue(Result result, IR::Expr* source) { - if (source->type == V4IR::BoolType) { + if (source->type == IR::BoolType) { RegisterID reg = toInt32Register(source, ScratchRegister); storeBool(reg, result); - } else if (source->type == V4IR::SInt32Type) { + } else if (source->type == IR::SInt32Type) { RegisterID reg = toInt32Register(source, ScratchRegister); storeInt32(reg, result); - } else if (source->type == V4IR::UInt32Type) { + } else if (source->type == IR::UInt32Type) { RegisterID reg = toUInt32Register(source, ScratchRegister); storeUInt32(reg, result); - } else if (source->type == V4IR::DoubleType) { + } else if (source->type == IR::DoubleType) { storeDouble(toDoubleRegister(source), result); - } else if (V4IR::Temp *temp = source->asTemp()) { + } else if (IR::Temp *temp = source->asTemp()) { #ifdef VALUE_FITS_IN_REGISTER Q_UNUSED(temp); @@ -1453,7 +1453,7 @@ void Assembler::copyValue(Result result, V4IR::Expr* source) loadDouble(temp, FPGpr0); storeDouble(FPGpr0, result); #endif - } else if (V4IR::Const *c = source->asConst()) { + } else if (IR::Const *c = source->asConst()) { QV4::Primitive v = convertToValue(c); storeValue(v, result); } else { @@ -1470,8 +1470,8 @@ template <> inline void prepareRelativeCall(const RelativeCall &relativeCall, As relativeCall.addr.base); } -} // end of namespace MASM -} // end of namespace QQmlJS +} // end of namespace JIT +} // end of namespace QV4 QT_END_NAMESPACE diff --git a/src/qml/jit/qv4binop.cpp b/src/qml/jit/qv4binop.cpp index 02762db65b..473f260be7 100644 --- a/src/qml/jit/qv4binop.cpp +++ b/src/qml/jit/qv4binop.cpp @@ -46,40 +46,37 @@ using namespace QV4; using namespace JIT; -using namespace QQmlJS; -using namespace MASM; - namespace { -inline bool isPregOrConst(V4IR::Expr *e) +inline bool isPregOrConst(IR::Expr *e) { - if (V4IR::Temp *t = e->asTemp()) - return t->kind == V4IR::Temp::PhysicalRegister; + if (IR::Temp *t = e->asTemp()) + return t->kind == IR::Temp::PhysicalRegister; return e->asConst() != 0; } } // anonymous namespace -void Binop::generate(V4IR::Expr *lhs, V4IR::Expr *rhs, V4IR::Temp *target) +void Binop::generate(IR::Expr *lhs, IR::Expr *rhs, IR::Temp *target) { - if (op != V4IR::OpMod - && lhs->type == V4IR::DoubleType && rhs->type == V4IR::DoubleType + if (op != IR::OpMod + && lhs->type == IR::DoubleType && rhs->type == IR::DoubleType && isPregOrConst(lhs) && isPregOrConst(rhs)) { doubleBinop(lhs, rhs, target); return; } - if (lhs->type == V4IR::SInt32Type && rhs->type == V4IR::SInt32Type) { + if (lhs->type == IR::SInt32Type && rhs->type == IR::SInt32Type) { if (int32Binop(lhs, rhs, target)) return; } Assembler::Jump done; - if (lhs->type != V4IR::StringType && rhs->type != V4IR::StringType) + if (lhs->type != IR::StringType && rhs->type != IR::StringType) done = genInlineBinop(lhs, rhs, target); // TODO: inline var===null and var!==null Assembler::BinaryOperationInfo info = Assembler::binaryOperation(op); - if (op == V4IR::OpAdd && - (lhs->type == V4IR::StringType || rhs->type == V4IR::StringType)) { + if (op == IR::OpAdd && + (lhs->type == IR::StringType || rhs->type == IR::StringType)) { const Assembler::BinaryOperationInfo stringAdd = OPCONTEXT(__qmljs_add_string); info = stringAdd; } @@ -102,30 +99,30 @@ void Binop::generate(V4IR::Expr *lhs, V4IR::Expr *rhs, V4IR::Temp *target) } -void Binop::doubleBinop(V4IR::Expr *lhs, V4IR::Expr *rhs, V4IR::Temp *target) +void Binop::doubleBinop(IR::Expr *lhs, IR::Expr *rhs, IR::Temp *target) { Q_ASSERT(lhs->asConst() == 0 || rhs->asConst() == 0); Q_ASSERT(isPregOrConst(lhs)); Q_ASSERT(isPregOrConst(rhs)); Assembler::FPRegisterID targetReg; - if (target->kind == V4IR::Temp::PhysicalRegister) + if (target->kind == IR::Temp::PhysicalRegister) targetReg = (Assembler::FPRegisterID) target->index; else targetReg = Assembler::FPGpr0; switch (op) { - case V4IR::OpAdd: + case IR::OpAdd: as->addDouble(as->toDoubleRegister(lhs), as->toDoubleRegister(rhs), targetReg); break; - case V4IR::OpMul: + case IR::OpMul: as->mulDouble(as->toDoubleRegister(lhs), as->toDoubleRegister(rhs), targetReg); break; - case V4IR::OpSub: + case IR::OpSub: #if CPU(X86) || CPU(X86_64) - if (V4IR::Temp *rightTemp = rhs->asTemp()) { - if (rightTemp->kind == V4IR::Temp::PhysicalRegister && rightTemp->index == targetReg) { + if (IR::Temp *rightTemp = rhs->asTemp()) { + if (rightTemp->kind == IR::Temp::PhysicalRegister && rightTemp->index == targetReg) { as->moveDouble(targetReg, Assembler::FPGpr0); as->moveDouble(as->toDoubleRegister(lhs, targetReg), targetReg); as->subDouble(Assembler::FPGpr0, targetReg); @@ -133,7 +130,7 @@ void Binop::doubleBinop(V4IR::Expr *lhs, V4IR::Expr *rhs, V4IR::Temp *target) } } else if (rhs->asConst() && targetReg == Assembler::FPGpr0) { Q_ASSERT(lhs->asTemp()); - Q_ASSERT(lhs->asTemp()->kind == V4IR::Temp::PhysicalRegister); + Q_ASSERT(lhs->asTemp()->kind == IR::Temp::PhysicalRegister); as->moveDouble(as->toDoubleRegister(lhs, targetReg), targetReg); Assembler::FPRegisterID reg = (Assembler::FPRegisterID) lhs->asTemp()->index; as->moveDouble(as->toDoubleRegister(rhs, reg), reg); @@ -145,10 +142,10 @@ void Binop::doubleBinop(V4IR::Expr *lhs, V4IR::Expr *rhs, V4IR::Temp *target) as->subDouble(as->toDoubleRegister(lhs), as->toDoubleRegister(rhs), targetReg); break; - case V4IR::OpDiv: + case IR::OpDiv: #if CPU(X86) || CPU(X86_64) - if (V4IR::Temp *rightTemp = rhs->asTemp()) { - if (rightTemp->kind == V4IR::Temp::PhysicalRegister && rightTemp->index == targetReg) { + if (IR::Temp *rightTemp = rhs->asTemp()) { + if (rightTemp->kind == IR::Temp::PhysicalRegister && rightTemp->index == targetReg) { as->moveDouble(targetReg, Assembler::FPGpr0); as->moveDouble(as->toDoubleRegister(lhs, targetReg), targetReg); as->divDouble(Assembler::FPGpr0, targetReg); @@ -156,7 +153,7 @@ void Binop::doubleBinop(V4IR::Expr *lhs, V4IR::Expr *rhs, V4IR::Temp *target) } } else if (rhs->asConst() && targetReg == Assembler::FPGpr0) { Q_ASSERT(lhs->asTemp()); - Q_ASSERT(lhs->asTemp()->kind == V4IR::Temp::PhysicalRegister); + Q_ASSERT(lhs->asTemp()->kind == IR::Temp::PhysicalRegister); as->moveDouble(as->toDoubleRegister(lhs, targetReg), targetReg); Assembler::FPRegisterID reg = (Assembler::FPRegisterID) lhs->asTemp()->index; as->moveDouble(as->toDoubleRegister(rhs, reg), reg); @@ -168,7 +165,7 @@ void Binop::doubleBinop(V4IR::Expr *lhs, V4IR::Expr *rhs, V4IR::Temp *target) targetReg); break; default: { - Q_ASSERT(target->type == V4IR::BoolType); + Q_ASSERT(target->type == IR::BoolType); Assembler::Jump trueCase = as->branchDouble(false, op, lhs, rhs); as->storeBool(false, target); Assembler::Jump done = as->jump(); @@ -178,25 +175,25 @@ void Binop::doubleBinop(V4IR::Expr *lhs, V4IR::Expr *rhs, V4IR::Temp *target) } return; } - if (target->kind != V4IR::Temp::PhysicalRegister) + if (target->kind != IR::Temp::PhysicalRegister) as->storeDouble(Assembler::FPGpr0, target); } -bool Binop::int32Binop(V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Temp *target) +bool Binop::int32Binop(IR::Expr *leftSource, IR::Expr *rightSource, IR::Temp *target) { - Q_ASSERT(leftSource->type == V4IR::SInt32Type); + Q_ASSERT(leftSource->type == IR::SInt32Type); Assembler::RegisterID targetReg; - if (target->kind == V4IR::Temp::PhysicalRegister) + if (target->kind == IR::Temp::PhysicalRegister) targetReg = (Assembler::RegisterID) target->index; else targetReg = Assembler::ReturnValueRegister; switch (op) { - case V4IR::OpBitAnd: { - Q_ASSERT(rightSource->type == V4IR::SInt32Type); - if (rightSource->asTemp() && rightSource->asTemp()->kind == V4IR::Temp::PhysicalRegister - && target->kind == V4IR::Temp::PhysicalRegister + case IR::OpBitAnd: { + Q_ASSERT(rightSource->type == IR::SInt32Type); + if (rightSource->asTemp() && rightSource->asTemp()->kind == IR::Temp::PhysicalRegister + && target->kind == IR::Temp::PhysicalRegister && target->index == rightSource->asTemp()->index) { as->and32(as->toInt32Register(leftSource, Assembler::ScratchRegister), (Assembler::RegisterID) target->index); @@ -208,10 +205,10 @@ bool Binop::int32Binop(V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Te targetReg); as->storeInt32(targetReg, target); } return true; - case V4IR::OpBitOr: { - Q_ASSERT(rightSource->type == V4IR::SInt32Type); - if (rightSource->asTemp() && rightSource->asTemp()->kind == V4IR::Temp::PhysicalRegister - && target->kind == V4IR::Temp::PhysicalRegister + case IR::OpBitOr: { + Q_ASSERT(rightSource->type == IR::SInt32Type); + if (rightSource->asTemp() && rightSource->asTemp()->kind == IR::Temp::PhysicalRegister + && target->kind == IR::Temp::PhysicalRegister && target->index == rightSource->asTemp()->index) { as->or32(as->toInt32Register(leftSource, Assembler::ScratchRegister), (Assembler::RegisterID) target->index); @@ -223,10 +220,10 @@ bool Binop::int32Binop(V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Te targetReg); as->storeInt32(targetReg, target); } return true; - case V4IR::OpBitXor: { - Q_ASSERT(rightSource->type == V4IR::SInt32Type); - if (rightSource->asTemp() && rightSource->asTemp()->kind == V4IR::Temp::PhysicalRegister - && target->kind == V4IR::Temp::PhysicalRegister + case IR::OpBitXor: { + Q_ASSERT(rightSource->type == IR::SInt32Type); + if (rightSource->asTemp() && rightSource->asTemp()->kind == IR::Temp::PhysicalRegister + && target->kind == IR::Temp::PhysicalRegister && target->index == rightSource->asTemp()->index) { as->xor32(as->toInt32Register(leftSource, Assembler::ScratchRegister), (Assembler::RegisterID) target->index); @@ -238,10 +235,10 @@ bool Binop::int32Binop(V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Te targetReg); as->storeInt32(targetReg, target); } return true; - case V4IR::OpLShift: { - Q_ASSERT(rightSource->type == V4IR::SInt32Type); + case IR::OpLShift: { + Q_ASSERT(rightSource->type == IR::SInt32Type); - if (V4IR::Const *c = rightSource->asConst()) { + if (IR::Const *c = rightSource->asConst()) { as->lshift32(as->toInt32Register(leftSource, Assembler::ReturnValueRegister), Assembler::TrustedImm32(int(c->value) & 0x1f), targetReg); } else { @@ -253,10 +250,10 @@ bool Binop::int32Binop(V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Te } as->storeInt32(targetReg, target); } return true; - case V4IR::OpRShift: { - Q_ASSERT(rightSource->type == V4IR::SInt32Type); + case IR::OpRShift: { + Q_ASSERT(rightSource->type == IR::SInt32Type); - if (V4IR::Const *c = rightSource->asConst()) { + if (IR::Const *c = rightSource->asConst()) { as->rshift32(as->toInt32Register(leftSource, Assembler::ReturnValueRegister), Assembler::TrustedImm32(int(c->value) & 0x1f), targetReg); } else { @@ -267,10 +264,10 @@ bool Binop::int32Binop(V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Te } as->storeInt32(targetReg, target); } return true; - case V4IR::OpURShift: - Q_ASSERT(rightSource->type == V4IR::SInt32Type); + case IR::OpURShift: + Q_ASSERT(rightSource->type == IR::SInt32Type); - if (V4IR::Const *c = rightSource->asConst()) { + if (IR::Const *c = rightSource->asConst()) { as->urshift32(as->toInt32Register(leftSource, Assembler::ReturnValueRegister), Assembler::TrustedImm32(int(c->value) & 0x1f), targetReg); } else { @@ -281,11 +278,11 @@ bool Binop::int32Binop(V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Te } as->storeUInt32(targetReg, target); return true; - case V4IR::OpAdd: { - Q_ASSERT(rightSource->type == V4IR::SInt32Type); + case IR::OpAdd: { + Q_ASSERT(rightSource->type == IR::SInt32Type); Assembler::RegisterID targetReg; - if (target->kind == V4IR::Temp::PhysicalRegister) + if (target->kind == IR::Temp::PhysicalRegister) targetReg = (Assembler::RegisterID) target->index; else targetReg = Assembler::ReturnValueRegister; @@ -295,11 +292,11 @@ bool Binop::int32Binop(V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Te targetReg); as->storeInt32(targetReg, target); } return true; - case V4IR::OpSub: { - Q_ASSERT(rightSource->type == V4IR::SInt32Type); + case IR::OpSub: { + Q_ASSERT(rightSource->type == IR::SInt32Type); - if (rightSource->asTemp() && rightSource->asTemp()->kind == V4IR::Temp::PhysicalRegister - && target->kind == V4IR::Temp::PhysicalRegister + if (rightSource->asTemp() && rightSource->asTemp()->kind == IR::Temp::PhysicalRegister + && target->kind == IR::Temp::PhysicalRegister && target->index == rightSource->asTemp()->index) { Assembler::RegisterID targetReg = (Assembler::RegisterID) target->index; as->move(targetReg, Assembler::ScratchRegister); @@ -310,7 +307,7 @@ bool Binop::int32Binop(V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Te } Assembler::RegisterID targetReg; - if (target->kind == V4IR::Temp::PhysicalRegister) + if (target->kind == IR::Temp::PhysicalRegister) targetReg = (Assembler::RegisterID) target->index; else targetReg = Assembler::ReturnValueRegister; @@ -319,11 +316,11 @@ bool Binop::int32Binop(V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Te as->sub32(as->toInt32Register(rightSource, Assembler::ScratchRegister), targetReg); as->storeInt32(targetReg, target); } return true; - case V4IR::OpMul: { - Q_ASSERT(rightSource->type == V4IR::SInt32Type); + case IR::OpMul: { + Q_ASSERT(rightSource->type == IR::SInt32Type); Assembler::RegisterID targetReg; - if (target->kind == V4IR::Temp::PhysicalRegister) + if (target->kind == IR::Temp::PhysicalRegister) targetReg = (Assembler::RegisterID) target->index; else targetReg = Assembler::ReturnValueRegister; @@ -338,17 +335,17 @@ bool Binop::int32Binop(V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Te } } -static inline Assembler::FPRegisterID getFreeFPReg(V4IR::Expr *shouldNotOverlap, unsigned hint) +static inline Assembler::FPRegisterID getFreeFPReg(IR::Expr *shouldNotOverlap, unsigned hint) { - if (V4IR::Temp *t = shouldNotOverlap->asTemp()) - if (t->type == V4IR::DoubleType) - if (t->kind == V4IR::Temp::PhysicalRegister) + if (IR::Temp *t = shouldNotOverlap->asTemp()) + if (t->type == IR::DoubleType) + if (t->kind == IR::Temp::PhysicalRegister) if (t->index == hint) return Assembler::FPRegisterID(hint + 1); return Assembler::FPRegisterID(hint); } -Assembler::Jump Binop::genInlineBinop(V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Temp *target) +Assembler::Jump Binop::genInlineBinop(IR::Expr *leftSource, IR::Expr *rightSource, IR::Temp *target) { Assembler::Jump done; @@ -361,7 +358,7 @@ Assembler::Jump Binop::genInlineBinop(V4IR::Expr *leftSource, V4IR::Expr *rightS // Note: FPGPr0 can still not be used, because uint32->double conversion uses it as a scratch // register. switch (op) { - case V4IR::OpAdd: { + case IR::OpAdd: { Assembler::FPRegisterID lReg = getFreeFPReg(rightSource, 2); Assembler::FPRegisterID rReg = getFreeFPReg(leftSource, 4); Assembler::Jump leftIsNoDbl = as->genTryDoubleConversion(leftSource, lReg); @@ -376,7 +373,7 @@ Assembler::Jump Binop::genInlineBinop(V4IR::Expr *leftSource, V4IR::Expr *rightS if (rightIsNoDbl.isSet()) rightIsNoDbl.link(as); } break; - case V4IR::OpMul: { + case IR::OpMul: { Assembler::FPRegisterID lReg = getFreeFPReg(rightSource, 2); Assembler::FPRegisterID rReg = getFreeFPReg(leftSource, 4); Assembler::Jump leftIsNoDbl = as->genTryDoubleConversion(leftSource, lReg); @@ -391,7 +388,7 @@ Assembler::Jump Binop::genInlineBinop(V4IR::Expr *leftSource, V4IR::Expr *rightS if (rightIsNoDbl.isSet()) rightIsNoDbl.link(as); } break; - case V4IR::OpSub: { + case IR::OpSub: { Assembler::FPRegisterID lReg = getFreeFPReg(rightSource, 2); Assembler::FPRegisterID rReg = getFreeFPReg(leftSource, 4); Assembler::Jump leftIsNoDbl = as->genTryDoubleConversion(leftSource, lReg); @@ -406,7 +403,7 @@ Assembler::Jump Binop::genInlineBinop(V4IR::Expr *leftSource, V4IR::Expr *rightS if (rightIsNoDbl.isSet()) rightIsNoDbl.link(as); } break; - case V4IR::OpDiv: { + case IR::OpDiv: { Assembler::FPRegisterID lReg = getFreeFPReg(rightSource, 2); Assembler::FPRegisterID rReg = getFreeFPReg(leftSource, 4); Assembler::Jump leftIsNoDbl = as->genTryDoubleConversion(leftSource, lReg); diff --git a/src/qml/jit/qv4binop_p.h b/src/qml/jit/qv4binop_p.h index 06e0a8b68a..d29b370f37 100644 --- a/src/qml/jit/qv4binop_p.h +++ b/src/qml/jit/qv4binop_p.h @@ -52,18 +52,18 @@ namespace QV4 { namespace JIT { struct Binop { - Binop(QQmlJS::MASM::Assembler *assembler, QQmlJS::V4IR::AluOp operation) + Binop(Assembler *assembler, IR::AluOp operation) : as(assembler) , op(operation) {} - void generate(QQmlJS::V4IR::Expr *lhs, QQmlJS::V4IR::Expr *rhs, QQmlJS::V4IR::Temp *target); - void doubleBinop(QQmlJS::V4IR::Expr *lhs, QQmlJS::V4IR::Expr *rhs, QQmlJS::V4IR::Temp *target); - bool int32Binop(QQmlJS::V4IR::Expr *leftSource, QQmlJS::V4IR::Expr *rightSource, QQmlJS::V4IR::Temp *target); - QQmlJS::MASM::Assembler::Jump genInlineBinop(QQmlJS::V4IR::Expr *leftSource, QQmlJS::V4IR::Expr *rightSource, QQmlJS::V4IR::Temp *target); + void generate(IR::Expr *lhs, IR::Expr *rhs, IR::Temp *target); + void doubleBinop(IR::Expr *lhs, IR::Expr *rhs, IR::Temp *target); + bool int32Binop(IR::Expr *leftSource, IR::Expr *rightSource, IR::Temp *target); + Assembler::Jump genInlineBinop(IR::Expr *leftSource, IR::Expr *rightSource, IR::Temp *target); - QQmlJS::MASM::Assembler *as; - QQmlJS::V4IR::AluOp op; + Assembler *as; + IR::AluOp op; }; } diff --git a/src/qml/jit/qv4isel_masm.cpp b/src/qml/jit/qv4isel_masm.cpp index 26ef359b05..035d0fec76 100644 --- a/src/qml/jit/qv4isel_masm.cpp +++ b/src/qml/jit/qv4isel_masm.cpp @@ -64,16 +64,15 @@ # include <udis86.h> #endif -using namespace QQmlJS; -using namespace QQmlJS::MASM; using namespace QV4; +using namespace QV4::JIT; namespace { -inline bool isPregOrConst(V4IR::Expr *e) +inline bool isPregOrConst(IR::Expr *e) { - if (V4IR::Temp *t = e->asTemp()) - return t->kind == V4IR::Temp::PhysicalRegister; + if (IR::Temp *t = e->asTemp()) + return t->kind == IR::Temp::PhysicalRegister; return e->asConst() != 0; } } // anonymous namespace @@ -97,10 +96,10 @@ JSC::MacroAssemblerCodeRef Assembler::link(int *codeSize) Label endOfCode = label(); { - QHashIterator<V4IR::BasicBlock *, QVector<Jump> > it(_patches); + QHashIterator<IR::BasicBlock *, QVector<Jump> > it(_patches); while (it.hasNext()) { it.next(); - V4IR::BasicBlock *block = it.key(); + IR::BasicBlock *block = it.key(); Label target = _addrs.value(block); assert(target.isSet()); foreach (Jump jump, it.value()) @@ -125,10 +124,10 @@ JSC::MacroAssemblerCodeRef Assembler::link(int *codeSize) linkBuffer.link(jump, linkBuffer.locationOf(exceptionReturnLabel)); { - QHashIterator<V4IR::BasicBlock *, QVector<DataLabelPtr> > it(_labelPatches); + QHashIterator<IR::BasicBlock *, QVector<DataLabelPtr> > it(_labelPatches); while (it.hasNext()) { it.next(); - V4IR::BasicBlock *block = it.key(); + IR::BasicBlock *block = it.key(); Label target = _addrs.value(block); assert(target.isSet()); foreach (DataLabelPtr label, it.value()) @@ -192,7 +191,7 @@ JSC::MacroAssemblerCodeRef Assembler::link(int *codeSize) return codeRef; } -InstructionSelection::InstructionSelection(QQmlEnginePrivate *qmlEngine, QV4::ExecutableAllocator *execAllocator, V4IR::Module *module, Compiler::JSUnitGenerator *jsGenerator) +InstructionSelection::InstructionSelection(QQmlEnginePrivate *qmlEngine, QV4::ExecutableAllocator *execAllocator, IR::Module *module, Compiler::JSUnitGenerator *jsGenerator) : EvalInstructionSelection(execAllocator, module, jsGenerator) , _block(0) , _as(0) @@ -273,11 +272,11 @@ static QVector<int> getFpRegisters() void InstructionSelection::run(int functionIndex) { - V4IR::Function *function = irModule->functions[functionIndex]; + IR::Function *function = irModule->functions[functionIndex]; QVector<Lookup> lookups; qSwap(_function, function); - V4IR::Optimizer opt(_function); + IR::Optimizer opt(_function); opt.run(qmlEngine); #ifdef REGALLOC_IS_SUPPORTED @@ -292,8 +291,8 @@ void InstructionSelection::run(int functionIndex) opt.convertOutOfSSA(); ConvertTemps().toStackSlots(_function); } - V4IR::Optimizer::showMeTheCode(_function); - QSet<V4IR::Jump *> removableJumps = opt.calculateOptionalJumps(); + IR::Optimizer::showMeTheCode(_function); + QSet<IR::Jump *> removableJumps = opt.calculateOptionalJumps(); qSwap(_removableJumps, removableJumps); Assembler* oldAssembler = _as; @@ -315,11 +314,11 @@ void InstructionSelection::run(int functionIndex) int lastLine = -1; for (int i = 0, ei = _function->basicBlocks.size(); i != ei; ++i) { - V4IR::BasicBlock *nextBlock = (i < ei - 1) ? _function->basicBlocks[i + 1] : 0; + IR::BasicBlock *nextBlock = (i < ei - 1) ? _function->basicBlocks[i + 1] : 0; _block = _function->basicBlocks[i]; _as->registerBlock(_block, nextBlock); - foreach (V4IR::Stmt *s, _block->statements) { + foreach (IR::Stmt *s, _block->statements) { if (s->location.isValid()) { if (int(s->location.startLine) != lastLine) { Assembler::Address lineAddr(Assembler::ContextRegister, qOffsetOf(QV4::ExecutionContext, lineNumber)); @@ -358,7 +357,7 @@ QV4::CompiledData::CompilationUnit *InstructionSelection::backendCompileStep() return compilationUnit; } -void InstructionSelection::callBuiltinInvalid(V4IR::Name *func, V4IR::ExprList *args, V4IR::Temp *result) +void InstructionSelection::callBuiltinInvalid(IR::Name *func, IR::ExprList *args, IR::Temp *result) { prepareCallData(args, 0); @@ -376,58 +375,58 @@ void InstructionSelection::callBuiltinInvalid(V4IR::Name *func, V4IR::ExprList * } } -void InstructionSelection::callBuiltinTypeofMember(V4IR::Expr *base, const QString &name, - V4IR::Temp *result) +void InstructionSelection::callBuiltinTypeofMember(IR::Expr *base, const QString &name, + IR::Temp *result) { generateFunctionCall(result, __qmljs_builtin_typeof_member, Assembler::ContextRegister, Assembler::PointerToValue(base), Assembler::PointerToString(name)); } -void InstructionSelection::callBuiltinTypeofSubscript(V4IR::Expr *base, V4IR::Expr *index, - V4IR::Temp *result) +void InstructionSelection::callBuiltinTypeofSubscript(IR::Expr *base, IR::Expr *index, + IR::Temp *result) { generateFunctionCall(result, __qmljs_builtin_typeof_element, Assembler::ContextRegister, Assembler::PointerToValue(base), Assembler::PointerToValue(index)); } -void InstructionSelection::callBuiltinTypeofName(const QString &name, V4IR::Temp *result) +void InstructionSelection::callBuiltinTypeofName(const QString &name, IR::Temp *result) { generateFunctionCall(result, __qmljs_builtin_typeof_name, Assembler::ContextRegister, Assembler::PointerToString(name)); } -void InstructionSelection::callBuiltinTypeofValue(V4IR::Expr *value, V4IR::Temp *result) +void InstructionSelection::callBuiltinTypeofValue(IR::Expr *value, IR::Temp *result) { generateFunctionCall(result, __qmljs_builtin_typeof, Assembler::ContextRegister, Assembler::PointerToValue(value)); } -void InstructionSelection::callBuiltinDeleteMember(V4IR::Temp *base, const QString &name, V4IR::Temp *result) +void InstructionSelection::callBuiltinDeleteMember(IR::Temp *base, const QString &name, IR::Temp *result) { generateFunctionCall(result, __qmljs_delete_member, Assembler::ContextRegister, Assembler::Reference(base), Assembler::PointerToString(name)); } -void InstructionSelection::callBuiltinDeleteSubscript(V4IR::Temp *base, V4IR::Expr *index, - V4IR::Temp *result) +void InstructionSelection::callBuiltinDeleteSubscript(IR::Temp *base, IR::Expr *index, + IR::Temp *result) { generateFunctionCall(result, __qmljs_delete_subscript, Assembler::ContextRegister, Assembler::Reference(base), Assembler::PointerToValue(index)); } -void InstructionSelection::callBuiltinDeleteName(const QString &name, V4IR::Temp *result) +void InstructionSelection::callBuiltinDeleteName(const QString &name, IR::Temp *result) { generateFunctionCall(result, __qmljs_delete_name, Assembler::ContextRegister, Assembler::PointerToString(name)); } -void InstructionSelection::callBuiltinDeleteValue(V4IR::Temp *result) +void InstructionSelection::callBuiltinDeleteValue(IR::Temp *result) { _as->storeValue(Primitive::fromBoolean(false), result); } -void InstructionSelection::callBuiltinThrow(V4IR::Expr *arg) +void InstructionSelection::callBuiltinThrow(IR::Expr *arg) { generateFunctionCall(Assembler::ReturnValueRegister, __qmljs_throw, Assembler::ContextRegister, Assembler::PointerToValue(arg)); @@ -438,7 +437,7 @@ void InstructionSelection::callBuiltinReThrow() _as->jumpToExceptionHandler(); } -void InstructionSelection::callBuiltinUnwindException(V4IR::Temp *result) +void InstructionSelection::callBuiltinUnwindException(IR::Temp *result) { generateFunctionCall(result, __qmljs_builtin_unwind_exception, Assembler::ContextRegister); @@ -450,7 +449,7 @@ void InstructionSelection::callBuiltinPushCatchScope(const QString &exceptionNam generateFunctionCall(Assembler::ContextRegister, __qmljs_builtin_push_catch_scope, Assembler::ContextRegister, s); } -void InstructionSelection::callBuiltinForeachIteratorObject(V4IR::Temp *arg, V4IR::Temp *result) +void InstructionSelection::callBuiltinForeachIteratorObject(IR::Temp *arg, IR::Temp *result) { Q_ASSERT(arg); Q_ASSERT(result); @@ -458,7 +457,7 @@ void InstructionSelection::callBuiltinForeachIteratorObject(V4IR::Temp *arg, V4I generateFunctionCall(result, __qmljs_foreach_iterator_object, Assembler::ContextRegister, Assembler::Reference(arg)); } -void InstructionSelection::callBuiltinForeachNextPropertyname(V4IR::Temp *arg, V4IR::Temp *result) +void InstructionSelection::callBuiltinForeachNextPropertyname(IR::Temp *arg, IR::Temp *result) { Q_ASSERT(arg); Q_ASSERT(result); @@ -466,7 +465,7 @@ void InstructionSelection::callBuiltinForeachNextPropertyname(V4IR::Temp *arg, V generateFunctionCall(result, __qmljs_foreach_next_property_name, Assembler::Reference(arg)); } -void InstructionSelection::callBuiltinPushWithScope(V4IR::Temp *arg) +void InstructionSelection::callBuiltinPushWithScope(IR::Temp *arg) { Q_ASSERT(arg); @@ -484,7 +483,7 @@ void InstructionSelection::callBuiltinDeclareVar(bool deletable, const QString & Assembler::TrustedImm32(deletable), Assembler::PointerToString(name)); } -void InstructionSelection::callBuiltinDefineGetterSetter(V4IR::Temp *object, const QString &name, V4IR::Temp *getter, V4IR::Temp *setter) +void InstructionSelection::callBuiltinDefineGetterSetter(IR::Temp *object, const QString &name, IR::Temp *getter, IR::Temp *setter) { Q_ASSERT(object); Q_ASSERT(getter); @@ -493,8 +492,8 @@ void InstructionSelection::callBuiltinDefineGetterSetter(V4IR::Temp *object, con Assembler::Reference(object), Assembler::PointerToString(name), Assembler::PointerToValue(getter), Assembler::PointerToValue(setter)); } -void InstructionSelection::callBuiltinDefineProperty(V4IR::Temp *object, const QString &name, - V4IR::Expr *value) +void InstructionSelection::callBuiltinDefineProperty(IR::Temp *object, const QString &name, + IR::Expr *value) { Q_ASSERT(object); Q_ASSERT(value->asTemp() || value->asConst()); @@ -505,7 +504,7 @@ void InstructionSelection::callBuiltinDefineProperty(V4IR::Temp *object, const Q Assembler::PointerToValue(value)); } -void InstructionSelection::callBuiltinDefineArray(V4IR::Temp *result, V4IR::ExprList *args) +void InstructionSelection::callBuiltinDefineArray(IR::Temp *result, IR::ExprList *args) { Q_ASSERT(result); @@ -514,7 +513,7 @@ void InstructionSelection::callBuiltinDefineArray(V4IR::Temp *result, V4IR::Expr baseAddressForCallArguments(), Assembler::TrustedImm32(length)); } -void InstructionSelection::callBuiltinDefineObjectLiteral(V4IR::Temp *result, V4IR::ExprList *args) +void InstructionSelection::callBuiltinDefineObjectLiteral(IR::Temp *result, IR::ExprList *args) { Q_ASSERT(result); @@ -522,7 +521,7 @@ void InstructionSelection::callBuiltinDefineObjectLiteral(V4IR::Temp *result, V4 const int classId = registerJSClass(args); - V4IR::ExprList *it = args; + IR::ExprList *it = args; while (it) { it = it->next; @@ -543,7 +542,7 @@ void InstructionSelection::callBuiltinDefineObjectLiteral(V4IR::Temp *result, V4 baseAddressForCallArguments(), Assembler::TrustedImm32(classId)); } -void InstructionSelection::callBuiltinSetupArgumentObject(V4IR::Temp *result) +void InstructionSelection::callBuiltinSetupArgumentObject(IR::Temp *result) { generateFunctionCall(result, __qmljs_builtin_setup_arguments_object, Assembler::ContextRegister); } @@ -553,7 +552,7 @@ void InstructionSelection::callBuiltinConvertThisToObject() generateFunctionCall(Assembler::Void, __qmljs_builtin_convert_this_to_object, Assembler::ContextRegister); } -void InstructionSelection::callValue(V4IR::Temp *value, V4IR::ExprList *args, V4IR::Temp *result) +void InstructionSelection::callValue(IR::Temp *value, IR::ExprList *args, IR::Temp *result) { Q_ASSERT(value); @@ -563,7 +562,7 @@ void InstructionSelection::callValue(V4IR::Temp *value, V4IR::ExprList *args, V4 baseAddressForCallData()); } -void InstructionSelection::loadThisObject(V4IR::Temp *temp) +void InstructionSelection::loadThisObject(IR::Temp *temp) { _as->loadPtr(Address(Assembler::ContextRegister, qOffsetOf(ExecutionContext, callData)), Assembler::ScratchRegister); #if defined(VALUE_FITS_IN_REGISTER) @@ -575,45 +574,45 @@ void InstructionSelection::loadThisObject(V4IR::Temp *temp) #endif } -void InstructionSelection::loadQmlIdArray(V4IR::Temp *temp) +void InstructionSelection::loadQmlIdArray(IR::Temp *temp) { generateFunctionCall(temp, __qmljs_get_id_array, Assembler::ContextRegister); } -void InstructionSelection::loadQmlImportedScripts(V4IR::Temp *temp) +void InstructionSelection::loadQmlImportedScripts(IR::Temp *temp) { generateFunctionCall(temp, __qmljs_get_imported_scripts, Assembler::ContextRegister); } -void InstructionSelection::loadQmlContextObject(V4IR::Temp *temp) +void InstructionSelection::loadQmlContextObject(IR::Temp *temp) { generateFunctionCall(temp, __qmljs_get_context_object, Assembler::ContextRegister); } -void InstructionSelection::loadQmlScopeObject(V4IR::Temp *temp) +void InstructionSelection::loadQmlScopeObject(IR::Temp *temp) { generateFunctionCall(temp, __qmljs_get_scope_object, Assembler::ContextRegister); } -void InstructionSelection::loadQmlSingleton(const QString &name, V4IR::Temp *temp) +void InstructionSelection::loadQmlSingleton(const QString &name, IR::Temp *temp) { generateFunctionCall(temp, __qmljs_get_qml_singleton, Assembler::ContextRegister, Assembler::PointerToString(name)); } -void InstructionSelection::loadConst(V4IR::Const *sourceConst, V4IR::Temp *targetTemp) +void InstructionSelection::loadConst(IR::Const *sourceConst, IR::Temp *targetTemp) { - if (targetTemp->kind == V4IR::Temp::PhysicalRegister) { - if (targetTemp->type == V4IR::DoubleType) { - Q_ASSERT(sourceConst->type == V4IR::DoubleType); + if (targetTemp->kind == IR::Temp::PhysicalRegister) { + if (targetTemp->type == IR::DoubleType) { + Q_ASSERT(sourceConst->type == IR::DoubleType); _as->toDoubleRegister(sourceConst, (Assembler::FPRegisterID) targetTemp->index); - } else if (targetTemp->type == V4IR::SInt32Type) { - Q_ASSERT(sourceConst->type == V4IR::SInt32Type); + } else if (targetTemp->type == IR::SInt32Type) { + Q_ASSERT(sourceConst->type == IR::SInt32Type); _as->toInt32Register(sourceConst, (Assembler::RegisterID) targetTemp->index); - } else if (targetTemp->type == V4IR::UInt32Type) { - Q_ASSERT(sourceConst->type == V4IR::UInt32Type); + } else if (targetTemp->type == IR::UInt32Type) { + Q_ASSERT(sourceConst->type == IR::UInt32Type); _as->toUInt32Register(sourceConst, (Assembler::RegisterID) targetTemp->index); - } else if (targetTemp->type == V4IR::BoolType) { - Q_ASSERT(sourceConst->type == V4IR::BoolType); + } else if (targetTemp->type == IR::BoolType) { + Q_ASSERT(sourceConst->type == IR::BoolType); _as->move(Assembler::TrustedImm32(convertToValue(sourceConst).int_32), (Assembler::RegisterID) targetTemp->index); } else { @@ -624,7 +623,7 @@ void InstructionSelection::loadConst(V4IR::Const *sourceConst, V4IR::Temp *targe } } -void InstructionSelection::loadString(const QString &str, V4IR::Temp *targetTemp) +void InstructionSelection::loadString(const QString &str, IR::Temp *targetTemp) { Pointer srcAddr = _as->loadStringAddress(Assembler::ReturnValueRegister, str); _as->loadPtr(srcAddr, Assembler::ReturnValueRegister); @@ -638,13 +637,13 @@ void InstructionSelection::loadString(const QString &str, V4IR::Temp *targetTemp #endif } -void InstructionSelection::loadRegexp(V4IR::RegExp *sourceRegexp, V4IR::Temp *targetTemp) +void InstructionSelection::loadRegexp(IR::RegExp *sourceRegexp, IR::Temp *targetTemp) { int id = registerRegExp(sourceRegexp); generateFunctionCall(targetTemp, __qmljs_lookup_runtime_regexp, Assembler::ContextRegister, Assembler::TrustedImm32(id)); } -void InstructionSelection::getActivationProperty(const V4IR::Name *name, V4IR::Temp *temp) +void InstructionSelection::getActivationProperty(const IR::Name *name, IR::Temp *temp) { if (useFastLookups && name->global) { uint index = registerGlobalGetterLookup(*name->id); @@ -654,20 +653,20 @@ void InstructionSelection::getActivationProperty(const V4IR::Name *name, V4IR::T generateFunctionCall(temp, __qmljs_get_activation_property, Assembler::ContextRegister, Assembler::PointerToString(*name->id)); } -void InstructionSelection::setActivationProperty(V4IR::Expr *source, const QString &targetName) +void InstructionSelection::setActivationProperty(IR::Expr *source, const QString &targetName) { // ### should use a lookup call here generateFunctionCall(Assembler::Void, __qmljs_set_activation_property, Assembler::ContextRegister, Assembler::PointerToString(targetName), Assembler::PointerToValue(source)); } -void InstructionSelection::initClosure(V4IR::Closure *closure, V4IR::Temp *target) +void InstructionSelection::initClosure(IR::Closure *closure, IR::Temp *target) { int id = closure->value; generateFunctionCall(target, __qmljs_init_closure, Assembler::ContextRegister, Assembler::TrustedImm32(id)); } -void InstructionSelection::getProperty(V4IR::Expr *base, const QString &name, V4IR::Temp *target) +void InstructionSelection::getProperty(IR::Expr *base, const QString &name, IR::Temp *target) { if (useFastLookups) { uint index = registerGetterLookup(name); @@ -678,7 +677,7 @@ void InstructionSelection::getProperty(V4IR::Expr *base, const QString &name, V4 } } -void InstructionSelection::getQObjectProperty(V4IR::Expr *base, int propertyIndex, bool captureRequired, int attachedPropertiesId, V4IR::Temp *target) +void InstructionSelection::getQObjectProperty(IR::Expr *base, int propertyIndex, bool captureRequired, int attachedPropertiesId, IR::Temp *target) { if (attachedPropertiesId != 0) generateFunctionCall(target, __qmljs_get_attached_property, Assembler::ContextRegister, Assembler::TrustedImm32(attachedPropertiesId), Assembler::TrustedImm32(propertyIndex)); @@ -687,7 +686,7 @@ void InstructionSelection::getQObjectProperty(V4IR::Expr *base, int propertyInde Assembler::TrustedImm32(captureRequired)); } -void InstructionSelection::setProperty(V4IR::Expr *source, V4IR::Expr *targetBase, +void InstructionSelection::setProperty(IR::Expr *source, IR::Expr *targetBase, const QString &targetName) { if (useFastLookups) { @@ -702,13 +701,13 @@ void InstructionSelection::setProperty(V4IR::Expr *source, V4IR::Expr *targetBas } } -void InstructionSelection::setQObjectProperty(V4IR::Expr *source, V4IR::Expr *targetBase, int propertyIndex) +void InstructionSelection::setQObjectProperty(IR::Expr *source, IR::Expr *targetBase, int propertyIndex) { generateFunctionCall(Assembler::Void, __qmljs_set_qobject_property, Assembler::ContextRegister, Assembler::PointerToValue(targetBase), Assembler::TrustedImm32(propertyIndex), Assembler::PointerToValue(source)); } -void InstructionSelection::getElement(V4IR::Expr *base, V4IR::Expr *index, V4IR::Temp *target) +void InstructionSelection::getElement(IR::Expr *base, IR::Expr *index, IR::Temp *target) { if (useFastLookups) { uint lookup = registerIndexedGetterLookup(); @@ -722,7 +721,7 @@ void InstructionSelection::getElement(V4IR::Expr *base, V4IR::Expr *index, V4IR: Assembler::PointerToValue(base), Assembler::PointerToValue(index)); } -void InstructionSelection::setElement(V4IR::Expr *source, V4IR::Expr *targetBase, V4IR::Expr *targetIndex) +void InstructionSelection::setElement(IR::Expr *source, IR::Expr *targetBase, IR::Expr *targetIndex) { if (useFastLookups) { uint lookup = registerIndexedSetterLookup(); @@ -736,14 +735,14 @@ void InstructionSelection::setElement(V4IR::Expr *source, V4IR::Expr *targetBase Assembler::PointerToValue(source)); } -void InstructionSelection::copyValue(V4IR::Temp *sourceTemp, V4IR::Temp *targetTemp) +void InstructionSelection::copyValue(IR::Temp *sourceTemp, IR::Temp *targetTemp) { if (*sourceTemp == *targetTemp) return; - if (sourceTemp->kind == V4IR::Temp::PhysicalRegister) { - if (targetTemp->kind == V4IR::Temp::PhysicalRegister) { - if (sourceTemp->type == V4IR::DoubleType) + if (sourceTemp->kind == IR::Temp::PhysicalRegister) { + if (targetTemp->kind == IR::Temp::PhysicalRegister) { + if (sourceTemp->type == IR::DoubleType) _as->moveDouble((Assembler::FPRegisterID) sourceTemp->index, (Assembler::FPRegisterID) targetTemp->index); else @@ -752,16 +751,16 @@ void InstructionSelection::copyValue(V4IR::Temp *sourceTemp, V4IR::Temp *targetT return; } else { switch (sourceTemp->type) { - case V4IR::DoubleType: + case IR::DoubleType: _as->storeDouble((Assembler::FPRegisterID) sourceTemp->index, targetTemp); break; - case V4IR::SInt32Type: + case IR::SInt32Type: _as->storeInt32((Assembler::RegisterID) sourceTemp->index, targetTemp); break; - case V4IR::UInt32Type: + case IR::UInt32Type: _as->storeUInt32((Assembler::RegisterID) sourceTemp->index, targetTemp); break; - case V4IR::BoolType: + case IR::BoolType: _as->storeBool((Assembler::RegisterID) sourceTemp->index, targetTemp); break; default: @@ -770,22 +769,22 @@ void InstructionSelection::copyValue(V4IR::Temp *sourceTemp, V4IR::Temp *targetT } return; } - } else if (targetTemp->kind == V4IR::Temp::PhysicalRegister) { + } else if (targetTemp->kind == IR::Temp::PhysicalRegister) { switch (targetTemp->type) { - case V4IR::DoubleType: - Q_ASSERT(sourceTemp->type == V4IR::DoubleType); + case IR::DoubleType: + Q_ASSERT(sourceTemp->type == IR::DoubleType); _as->toDoubleRegister(sourceTemp, (Assembler::FPRegisterID) targetTemp->index); return; - case V4IR::BoolType: - Q_ASSERT(sourceTemp->type == V4IR::BoolType); + case IR::BoolType: + Q_ASSERT(sourceTemp->type == IR::BoolType); _as->toInt32Register(sourceTemp, (Assembler::RegisterID) targetTemp->index); return; - case V4IR::SInt32Type: - Q_ASSERT(sourceTemp->type == V4IR::SInt32Type); + case IR::SInt32Type: + Q_ASSERT(sourceTemp->type == IR::SInt32Type); _as->toInt32Register(sourceTemp, (Assembler::RegisterID) targetTemp->index); return; - case V4IR::UInt32Type: - Q_ASSERT(sourceTemp->type == V4IR::UInt32Type); + case IR::UInt32Type: + Q_ASSERT(sourceTemp->type == IR::UInt32Type); _as->toUInt32Register(sourceTemp, (Assembler::RegisterID) targetTemp->index); return; default: @@ -799,13 +798,13 @@ void InstructionSelection::copyValue(V4IR::Temp *sourceTemp, V4IR::Temp *targetT Assembler::ScratchRegister); } -void InstructionSelection::swapValues(V4IR::Temp *sourceTemp, V4IR::Temp *targetTemp) +void InstructionSelection::swapValues(IR::Temp *sourceTemp, IR::Temp *targetTemp) { - if (sourceTemp->kind == V4IR::Temp::PhysicalRegister) { - if (targetTemp->kind == V4IR::Temp::PhysicalRegister) { + if (sourceTemp->kind == IR::Temp::PhysicalRegister) { + if (targetTemp->kind == IR::Temp::PhysicalRegister) { Q_ASSERT(sourceTemp->type == targetTemp->type); - if (sourceTemp->type == V4IR::DoubleType) { + if (sourceTemp->type == IR::DoubleType) { _as->moveDouble((Assembler::FPRegisterID) targetTemp->index, Assembler::FPGpr0); _as->moveDouble((Assembler::FPRegisterID) sourceTemp->index, (Assembler::FPRegisterID) targetTemp->index); @@ -816,8 +815,8 @@ void InstructionSelection::swapValues(V4IR::Temp *sourceTemp, V4IR::Temp *target } return; } - } else if (sourceTemp->kind == V4IR::Temp::StackSlot) { - if (targetTemp->kind == V4IR::Temp::StackSlot) { + } else if (sourceTemp->kind == IR::Temp::StackSlot) { + if (targetTemp->kind == IR::Temp::StackSlot) { // Note: a swap for two stack-slots can involve different types. #if CPU(X86_64) _as->load64(_as->stackSlotPointer(targetTemp), Assembler::ReturnValueRegister); @@ -840,15 +839,15 @@ void InstructionSelection::swapValues(V4IR::Temp *sourceTemp, V4IR::Temp *target } } - V4IR::Temp *stackTemp = sourceTemp->kind == V4IR::Temp::StackSlot ? sourceTemp : targetTemp; - V4IR::Temp *registerTemp = sourceTemp->kind == V4IR::Temp::PhysicalRegister ? sourceTemp + IR::Temp *stackTemp = sourceTemp->kind == IR::Temp::StackSlot ? sourceTemp : targetTemp; + IR::Temp *registerTemp = sourceTemp->kind == IR::Temp::PhysicalRegister ? sourceTemp : targetTemp; Assembler::Pointer addr = _as->stackSlotPointer(stackTemp); - if (registerTemp->type == V4IR::DoubleType) { + if (registerTemp->type == IR::DoubleType) { _as->loadDouble(addr, Assembler::FPGpr0); _as->storeDouble((Assembler::FPRegisterID) registerTemp->index, addr); _as->moveDouble(Assembler::FPGpr0, (Assembler::FPRegisterID) registerTemp->index); - } else if (registerTemp->type == V4IR::UInt32Type) { + } else if (registerTemp->type == IR::UInt32Type) { _as->toUInt32Register(addr, Assembler::ScratchRegister); _as->storeUInt32((Assembler::RegisterID) registerTemp->index, addr); _as->move(Assembler::ScratchRegister, (Assembler::RegisterID) registerTemp->index); @@ -859,10 +858,10 @@ void InstructionSelection::swapValues(V4IR::Temp *sourceTemp, V4IR::Temp *target addr.offset += 4; quint32 tag; switch (registerTemp->type) { - case V4IR::BoolType: + case IR::BoolType: tag = QV4::Value::_Boolean_Type; break; - case V4IR::SInt32Type: + case IR::SInt32Type: tag = QV4::Value::_Integer_Type; break; default: @@ -880,21 +879,21 @@ void InstructionSelection::swapValues(V4IR::Temp *sourceTemp, V4IR::Temp *target #define setOpContext(op, opName, operation) \ do { opContext = operation; opName = isel_stringIfy(operation); } while (0) -void InstructionSelection::unop(V4IR::AluOp oper, V4IR::Temp *sourceTemp, V4IR::Temp *targetTemp) +void InstructionSelection::unop(IR::AluOp oper, IR::Temp *sourceTemp, IR::Temp *targetTemp) { QV4::JIT::Unop unop(_as, oper); unop.generate(sourceTemp, targetTemp); } -void InstructionSelection::binop(V4IR::AluOp oper, V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Temp *target) +void InstructionSelection::binop(IR::AluOp oper, IR::Expr *leftSource, IR::Expr *rightSource, IR::Temp *target) { QV4::JIT::Binop binop(_as, oper); binop.generate(leftSource, rightSource, target); } -void InstructionSelection::callProperty(V4IR::Expr *base, const QString &name, V4IR::ExprList *args, - V4IR::Temp *result) +void InstructionSelection::callProperty(IR::Expr *base, const QString &name, IR::ExprList *args, + IR::Temp *result) { assert(base != 0); @@ -914,8 +913,8 @@ void InstructionSelection::callProperty(V4IR::Expr *base, const QString &name, V } } -void InstructionSelection::callSubscript(V4IR::Expr *base, V4IR::Expr *index, V4IR::ExprList *args, - V4IR::Temp *result) +void InstructionSelection::callSubscript(IR::Expr *base, IR::Expr *index, IR::ExprList *args, + IR::Temp *result) { assert(base != 0); @@ -925,19 +924,19 @@ void InstructionSelection::callSubscript(V4IR::Expr *base, V4IR::Expr *index, V4 baseAddressForCallData()); } -void InstructionSelection::convertType(V4IR::Temp *source, V4IR::Temp *target) +void InstructionSelection::convertType(IR::Temp *source, IR::Temp *target) { switch (target->type) { - case V4IR::DoubleType: + case IR::DoubleType: convertTypeToDouble(source, target); break; - case V4IR::BoolType: + case IR::BoolType: convertTypeToBool(source, target); break; - case V4IR::SInt32Type: + case IR::SInt32Type: convertTypeToSInt32(source, target); break; - case V4IR::UInt32Type: + case IR::UInt32Type: convertTypeToUInt32(source, target); break; default: @@ -946,33 +945,33 @@ void InstructionSelection::convertType(V4IR::Temp *source, V4IR::Temp *target) } } -void InstructionSelection::convertTypeSlowPath(V4IR::Temp *source, V4IR::Temp *target) +void InstructionSelection::convertTypeSlowPath(IR::Temp *source, IR::Temp *target) { - Q_ASSERT(target->type != V4IR::BoolType); + Q_ASSERT(target->type != IR::BoolType); - if (target->type & V4IR::NumberType) - unop(V4IR::OpUPlus, source, target); + if (target->type & IR::NumberType) + unop(IR::OpUPlus, source, target); else copyValue(source, target); } -void InstructionSelection::convertTypeToDouble(V4IR::Temp *source, V4IR::Temp *target) +void InstructionSelection::convertTypeToDouble(IR::Temp *source, IR::Temp *target) { switch (source->type) { - case V4IR::SInt32Type: - case V4IR::BoolType: - case V4IR::NullType: + case IR::SInt32Type: + case IR::BoolType: + case IR::NullType: convertIntToDouble(source, target); break; - case V4IR::UInt32Type: + case IR::UInt32Type: convertUIntToDouble(source, target); break; - case V4IR::UndefinedType: + case IR::UndefinedType: _as->loadDouble(_as->loadTempAddress(Assembler::ScratchRegister, source), Assembler::FPGpr0); _as->storeDouble(Assembler::FPGpr0, target); break; - case V4IR::StringType: - case V4IR::VarType: { + case IR::StringType: + case IR::VarType: { // load the tag: Assembler::Pointer tagAddr = _as->loadTempAddress(Assembler::ScratchRegister, source); tagAddr.offset += 4; @@ -1002,7 +1001,7 @@ void InstructionSelection::convertTypeToDouble(V4IR::Temp *source, V4IR::Temp *t // it is a double: isDbl.link(_as); Assembler::Pointer addr2 = _as->loadTempAddress(Assembler::ScratchRegister, source); - if (target->kind == V4IR::Temp::StackSlot) { + if (target->kind == IR::Temp::StackSlot) { #if QT_POINTER_SIZE == 8 _as->load64(addr2, Assembler::ScratchRegister); _as->store64(Assembler::ScratchRegister, _as->stackSlotPointer(target)); @@ -1023,19 +1022,19 @@ void InstructionSelection::convertTypeToDouble(V4IR::Temp *source, V4IR::Temp *t } } -void InstructionSelection::convertTypeToBool(V4IR::Temp *source, V4IR::Temp *target) +void InstructionSelection::convertTypeToBool(IR::Temp *source, IR::Temp *target) { switch (source->type) { - case V4IR::SInt32Type: - case V4IR::UInt32Type: + case IR::SInt32Type: + case IR::UInt32Type: convertIntToBool(source, target); break; - case V4IR::DoubleType: { + case IR::DoubleType: { // The source is in a register if the register allocator is used. If the register // allocator was not used, then that means that we can use any register for to // load the double into. Assembler::FPRegisterID reg; - if (source->kind == V4IR::Temp::PhysicalRegister) + if (source->kind == IR::Temp::PhysicalRegister) reg = (Assembler::FPRegisterID) source->index; else reg = _as->toDoubleRegister(source, (Assembler::FPRegisterID) 1); @@ -1052,12 +1051,12 @@ void InstructionSelection::convertTypeToBool(V4IR::Temp *source, V4IR::Temp *tar // done: done.link(_as); } break; - case V4IR::UndefinedType: - case V4IR::NullType: + case IR::UndefinedType: + case IR::NullType: _as->storeBool(false, target); break; - case V4IR::StringType: - case V4IR::VarType: + case IR::StringType: + case IR::VarType: default: generateFunctionCall(Assembler::ReturnValueRegister, __qmljs_to_boolean, Assembler::PointerToValue(source)); @@ -1066,10 +1065,10 @@ void InstructionSelection::convertTypeToBool(V4IR::Temp *source, V4IR::Temp *tar } } -void InstructionSelection::convertTypeToSInt32(V4IR::Temp *source, V4IR::Temp *target) +void InstructionSelection::convertTypeToSInt32(IR::Temp *source, IR::Temp *target) { switch (source->type) { - case V4IR::VarType: { + case IR::VarType: { #if QT_POINTER_SIZE == 8 Assembler::Pointer addr = _as->loadTempAddress(Assembler::ScratchRegister, source); @@ -1096,7 +1095,7 @@ void InstructionSelection::convertTypeToSInt32(V4IR::Temp *source, V4IR::Temp *t isInt.link(_as); success.link(_as); - if (target->kind == V4IR::Temp::StackSlot) { + if (target->kind == IR::Temp::StackSlot) { Assembler::Pointer targetAddr = _as->stackSlotPointer(target); _as->store32(Assembler::ReturnValueRegister, targetAddr); targetAddr.offset += 4; @@ -1114,7 +1113,7 @@ void InstructionSelection::convertTypeToSInt32(V4IR::Temp *source, V4IR::Temp *t // check if it's an int32: Assembler::Jump fallback = _as->branch32(Assembler::NotEqual, Assembler::ReturnValueRegister, Assembler::TrustedImm32(Value::_Integer_Type)); - if (target->kind == V4IR::Temp::StackSlot) { + if (target->kind == IR::Temp::StackSlot) { _as->load32(addr, Assembler::ScratchRegister); Assembler::Pointer targetAddr = _as->stackSlotPointer(target); _as->store32(Assembler::ScratchRegister, targetAddr); @@ -1135,7 +1134,7 @@ void InstructionSelection::convertTypeToSInt32(V4IR::Temp *source, V4IR::Temp *t #endif } break; - case V4IR::DoubleType: { + case IR::DoubleType: { Assembler::Jump success = _as->branchTruncateDoubleToInt32(_as->toDoubleRegister(source), Assembler::ReturnValueRegister, @@ -1145,18 +1144,18 @@ void InstructionSelection::convertTypeToSInt32(V4IR::Temp *source, V4IR::Temp *t success.link(_as); _as->storeInt32(Assembler::ReturnValueRegister, target); } break; - case V4IR::UInt32Type: + case IR::UInt32Type: _as->storeInt32(_as->toUInt32Register(source, Assembler::ReturnValueRegister), target); break; - case V4IR::NullType: - case V4IR::UndefinedType: + case IR::NullType: + case IR::UndefinedType: _as->move(Assembler::TrustedImm32(0), Assembler::ReturnValueRegister); _as->storeInt32(Assembler::ReturnValueRegister, target); break; - case V4IR::BoolType: + case IR::BoolType: _as->storeInt32(_as->toInt32Register(source, Assembler::ReturnValueRegister), target); break; - case V4IR::StringType: + case IR::StringType: default: generateFunctionCall(Assembler::ReturnValueRegister, __qmljs_value_to_int32, _as->loadTempAddress(Assembler::ScratchRegister, source)); @@ -1165,10 +1164,10 @@ void InstructionSelection::convertTypeToSInt32(V4IR::Temp *source, V4IR::Temp *t } // switch (source->type) } -void InstructionSelection::convertTypeToUInt32(V4IR::Temp *source, V4IR::Temp *target) +void InstructionSelection::convertTypeToUInt32(IR::Temp *source, IR::Temp *target) { switch (source->type) { - case V4IR::VarType: { + case IR::VarType: { // load the tag: Assembler::Pointer tagAddr = _as->loadTempAddress(Assembler::ScratchRegister, source); tagAddr.offset += 4; @@ -1189,7 +1188,7 @@ void InstructionSelection::convertTypeToUInt32(V4IR::Temp *source, V4IR::Temp *t intDone.link(_as); } break; - case V4IR::DoubleType: { + case IR::DoubleType: { Assembler::FPRegisterID reg = _as->toDoubleRegister(source); Assembler::Jump success = _as->branchTruncateDoubleToUint32(reg, Assembler::ReturnValueRegister, @@ -1199,18 +1198,18 @@ void InstructionSelection::convertTypeToUInt32(V4IR::Temp *source, V4IR::Temp *t success.link(_as); _as->storeUInt32(Assembler::ReturnValueRegister, target); } break; - case V4IR::NullType: - case V4IR::UndefinedType: + case IR::NullType: + case IR::UndefinedType: _as->move(Assembler::TrustedImm32(0), Assembler::ReturnValueRegister); _as->storeUInt32(Assembler::ReturnValueRegister, target); break; - case V4IR::StringType: + case IR::StringType: generateFunctionCall(Assembler::ReturnValueRegister, __qmljs_value_to_uint32, Assembler::PointerToValue(source)); _as->storeUInt32(Assembler::ReturnValueRegister, target); break; - case V4IR::SInt32Type: - case V4IR::BoolType: + case IR::SInt32Type: + case IR::BoolType: _as->storeUInt32(_as->toInt32Register(source, Assembler::ReturnValueRegister), target); break; default: @@ -1218,7 +1217,7 @@ void InstructionSelection::convertTypeToUInt32(V4IR::Temp *source, V4IR::Temp *t } // switch (source->type) } -void InstructionSelection::constructActivationProperty(V4IR::Name *func, V4IR::ExprList *args, V4IR::Temp *result) +void InstructionSelection::constructActivationProperty(IR::Name *func, IR::ExprList *args, IR::Temp *result) { assert(func != 0); prepareCallData(args, 0); @@ -1238,7 +1237,7 @@ void InstructionSelection::constructActivationProperty(V4IR::Name *func, V4IR::E } -void InstructionSelection::constructProperty(V4IR::Temp *base, const QString &name, V4IR::ExprList *args, V4IR::Temp *result) +void InstructionSelection::constructProperty(IR::Temp *base, const QString &name, IR::ExprList *args, IR::Temp *result) { prepareCallData(args, base); if (useFastLookups) { @@ -1255,7 +1254,7 @@ void InstructionSelection::constructProperty(V4IR::Temp *base, const QString &na baseAddressForCallData()); } -void InstructionSelection::constructValue(V4IR::Temp *value, V4IR::ExprList *args, V4IR::Temp *result) +void InstructionSelection::constructValue(IR::Temp *value, IR::ExprList *args, IR::Temp *result) { assert(value != 0); @@ -1266,20 +1265,20 @@ void InstructionSelection::constructValue(V4IR::Temp *value, V4IR::ExprList *arg baseAddressForCallData()); } -void InstructionSelection::visitJump(V4IR::Jump *s) +void InstructionSelection::visitJump(IR::Jump *s) { if (!_removableJumps.contains(s)) _as->jumpToBlock(_block, s->target); } -void InstructionSelection::visitCJump(V4IR::CJump *s) +void InstructionSelection::visitCJump(IR::CJump *s) { - if (V4IR::Temp *t = s->cond->asTemp()) { + if (IR::Temp *t = s->cond->asTemp()) { Assembler::RegisterID reg; - if (t->kind == V4IR::Temp::PhysicalRegister) { - Q_ASSERT(t->type == V4IR::BoolType); + if (t->kind == IR::Temp::PhysicalRegister) { + Q_ASSERT(t->type == IR::BoolType); reg = (Assembler::RegisterID) t->index; - } else if (t->kind == V4IR::Temp::StackSlot && t->type == V4IR::BoolType) { + } else if (t->kind == IR::Temp::StackSlot && t->type == IR::BoolType) { reg = Assembler::ReturnValueRegister; _as->toInt32Register(t, reg); } else { @@ -1302,23 +1301,23 @@ void InstructionSelection::visitCJump(V4IR::CJump *s) _as->generateCJumpOnNonZero(reg, _block, s->iftrue, s->iffalse); return; - } else if (V4IR::Const *c = s->cond->asConst()) { + } else if (IR::Const *c = s->cond->asConst()) { // TODO: SSA optimization for constant condition evaluation should remove this. // See also visitCJump() in RegAllocInfo. generateFunctionCall(Assembler::ReturnValueRegister, __qmljs_to_boolean, Assembler::PointerToValue(c)); _as->generateCJumpOnNonZero(Assembler::ReturnValueRegister, _block, s->iftrue, s->iffalse); return; - } else if (V4IR::Binop *b = s->cond->asBinop()) { - if (b->left->type == V4IR::DoubleType && b->right->type == V4IR::DoubleType + } else if (IR::Binop *b = s->cond->asBinop()) { + if (b->left->type == IR::DoubleType && b->right->type == IR::DoubleType && visitCJumpDouble(b->op, b->left, b->right, s->iftrue, s->iffalse)) return; - if (b->op == V4IR::OpStrictEqual || b->op == V4IR::OpStrictNotEqual) { + if (b->op == IR::OpStrictEqual || b->op == IR::OpStrictNotEqual) { visitCJumpStrict(b, s->iftrue, s->iffalse); return; } - if (b->op == V4IR::OpEqual || b->op == V4IR::OpNotEqual) { + if (b->op == IR::OpEqual || b->op == IR::OpNotEqual) { visitCJumpEqual(b, s->iftrue, s->iffalse); return; } @@ -1328,16 +1327,16 @@ void InstructionSelection::visitCJump(V4IR::CJump *s) const char *opName = 0; switch (b->op) { default: Q_UNREACHABLE(); assert(!"todo"); break; - case V4IR::OpGt: setOp(op, opName, __qmljs_cmp_gt); break; - case V4IR::OpLt: setOp(op, opName, __qmljs_cmp_lt); break; - case V4IR::OpGe: setOp(op, opName, __qmljs_cmp_ge); break; - case V4IR::OpLe: setOp(op, opName, __qmljs_cmp_le); break; - case V4IR::OpEqual: setOp(op, opName, __qmljs_cmp_eq); break; - case V4IR::OpNotEqual: setOp(op, opName, __qmljs_cmp_ne); break; - case V4IR::OpStrictEqual: setOp(op, opName, __qmljs_cmp_se); break; - case V4IR::OpStrictNotEqual: setOp(op, opName, __qmljs_cmp_sne); break; - case V4IR::OpInstanceof: setOpContext(op, opName, __qmljs_cmp_instanceof); break; - case V4IR::OpIn: setOpContext(op, opName, __qmljs_cmp_in); break; + case IR::OpGt: setOp(op, opName, __qmljs_cmp_gt); break; + case IR::OpLt: setOp(op, opName, __qmljs_cmp_lt); break; + case IR::OpGe: setOp(op, opName, __qmljs_cmp_ge); break; + case IR::OpLe: setOp(op, opName, __qmljs_cmp_le); break; + case IR::OpEqual: setOp(op, opName, __qmljs_cmp_eq); break; + case IR::OpNotEqual: setOp(op, opName, __qmljs_cmp_ne); break; + case IR::OpStrictEqual: setOp(op, opName, __qmljs_cmp_se); break; + case IR::OpStrictNotEqual: setOp(op, opName, __qmljs_cmp_sne); break; + case IR::OpInstanceof: setOpContext(op, opName, __qmljs_cmp_instanceof); break; + case IR::OpIn: setOpContext(op, opName, __qmljs_cmp_in); break; } // switch // TODO: in SSA optimization, do constant expression evaluation. @@ -1361,12 +1360,12 @@ void InstructionSelection::visitCJump(V4IR::CJump *s) Q_UNREACHABLE(); } -void InstructionSelection::visitRet(V4IR::Ret *s) +void InstructionSelection::visitRet(IR::Ret *s) { if (!s) { // this only happens if the method doesn't have a return statement and can // only exit through an exception - } else if (V4IR::Temp *t = s->expr->asTemp()) { + } else if (IR::Temp *t = s->expr->asTemp()) { #if CPU(X86) || CPU(ARM) # if CPU(X86) @@ -1377,12 +1376,12 @@ void InstructionSelection::visitRet(V4IR::Ret *s) Assembler::RegisterID highReg = JSC::ARMRegisters::r1; # endif - if (t->kind == V4IR::Temp::PhysicalRegister) { + if (t->kind == IR::Temp::PhysicalRegister) { switch (t->type) { - case V4IR::DoubleType: + case IR::DoubleType: _as->moveDoubleToInts((Assembler::FPRegisterID) t->index, lowReg, highReg); break; - case V4IR::UInt32Type: { + case IR::UInt32Type: { Assembler::RegisterID srcReg = (Assembler::RegisterID) t->index; Assembler::Jump intRange = _as->branch32(Assembler::GreaterThanOrEqual, srcReg, Assembler::TrustedImm32(0)); _as->convertUInt32ToDouble(srcReg, Assembler::FPGpr0, Assembler::ReturnValueRegister); @@ -1393,11 +1392,11 @@ void InstructionSelection::visitRet(V4IR::Ret *s) _as->move(Assembler::TrustedImm32(QV4::Value::_Integer_Type), highReg); done.link(_as); } break; - case V4IR::SInt32Type: + case IR::SInt32Type: _as->move((Assembler::RegisterID) t->index, lowReg); _as->move(Assembler::TrustedImm32(QV4::Value::_Integer_Type), highReg); break; - case V4IR::BoolType: + case IR::BoolType: _as->move((Assembler::RegisterID) t->index, lowReg); _as->move(Assembler::TrustedImm32(QV4::Value::_Boolean_Type), highReg); break; @@ -1411,14 +1410,14 @@ void InstructionSelection::visitRet(V4IR::Ret *s) _as->load32(addr, highReg); } #else - if (t->kind == V4IR::Temp::PhysicalRegister) { - if (t->type == V4IR::DoubleType) { + if (t->kind == IR::Temp::PhysicalRegister) { + if (t->type == IR::DoubleType) { _as->moveDoubleTo64((Assembler::FPRegisterID) t->index, Assembler::ReturnValueRegister); _as->move(Assembler::TrustedImm64(QV4::Value::NaNEncodeMask), Assembler::ScratchRegister); _as->xor64(Assembler::ScratchRegister, Assembler::ReturnValueRegister); - } else if (t->type == V4IR::UInt32Type) { + } else if (t->type == IR::UInt32Type) { Assembler::RegisterID srcReg = (Assembler::RegisterID) t->index; Assembler::Jump intRange = _as->branch32(Assembler::GreaterThanOrEqual, srcReg, Assembler::TrustedImm32(0)); _as->convertUInt32ToDouble(srcReg, Assembler::FPGpr0, Assembler::ReturnValueRegister); @@ -1436,10 +1435,10 @@ void InstructionSelection::visitRet(V4IR::Ret *s) _as->zeroExtend32ToPtr((Assembler::RegisterID) t->index, Assembler::ReturnValueRegister); quint64 tag; switch (t->type) { - case V4IR::SInt32Type: + case IR::SInt32Type: tag = QV4::Value::_Integer_Type; break; - case V4IR::BoolType: + case IR::BoolType: tag = QV4::Value::_Boolean_Type; break; default: @@ -1453,7 +1452,7 @@ void InstructionSelection::visitRet(V4IR::Ret *s) _as->copyValue(Assembler::ReturnValueRegister, t); } #endif - } else if (V4IR::Const *c = s->expr->asConst()) { + } else if (IR::Const *c = s->expr->asConst()) { QV4::Primitive retVal = convertToValue(c); #if CPU(X86) _as->move(Assembler::TrustedImm32(retVal.int_32), JSC::X86Registers::eax); @@ -1480,19 +1479,19 @@ void InstructionSelection::visitRet(V4IR::Ret *s) _as->ret(); } -int InstructionSelection::prepareVariableArguments(V4IR::ExprList* args) +int InstructionSelection::prepareVariableArguments(IR::ExprList* args) { int argc = 0; - for (V4IR::ExprList *it = args; it; it = it->next) { + for (IR::ExprList *it = args; it; it = it->next) { ++argc; } int i = 0; - for (V4IR::ExprList *it = args; it; it = it->next, ++i) { - V4IR::Expr *arg = it->expr; + for (IR::ExprList *it = args; it; it = it->next, ++i) { + IR::Expr *arg = it->expr; Q_ASSERT(arg != 0); Pointer dst(_as->stackLayout().argumentAddressForCall(i)); - if (arg->asTemp() && arg->asTemp()->kind != V4IR::Temp::PhysicalRegister) + if (arg->asTemp() && arg->asTemp()->kind != IR::Temp::PhysicalRegister) _as->memcopyValue(dst, arg->asTemp(), Assembler::ScratchRegister); else _as->copyValue(dst, arg); @@ -1501,10 +1500,10 @@ int InstructionSelection::prepareVariableArguments(V4IR::ExprList* args) return argc; } -int InstructionSelection::prepareCallData(V4IR::ExprList* args, V4IR::Expr *thisObject) +int InstructionSelection::prepareCallData(IR::ExprList* args, IR::Expr *thisObject) { int argc = 0; - for (V4IR::ExprList *it = args; it; it = it->next) { + for (IR::ExprList *it = args; it; it = it->next) { ++argc; } @@ -1519,11 +1518,11 @@ int InstructionSelection::prepareCallData(V4IR::ExprList* args, V4IR::Expr *this _as->copyValue(p, thisObject); int i = 0; - for (V4IR::ExprList *it = args; it; it = it->next, ++i) { - V4IR::Expr *arg = it->expr; + for (IR::ExprList *it = args; it; it = it->next, ++i) { + IR::Expr *arg = it->expr; Q_ASSERT(arg != 0); Pointer dst(_as->stackLayout().argumentAddressForCall(i)); - if (arg->asTemp() && arg->asTemp()->kind != V4IR::Temp::PhysicalRegister) + if (arg->asTemp() && arg->asTemp()->kind != IR::Temp::PhysicalRegister) _as->memcopyValue(dst, arg->asTemp(), Assembler::ScratchRegister); else _as->copyValue(dst, arg); @@ -1551,7 +1550,7 @@ int Assembler::ConstantTable::add(const Primitive &v) return idx; } -Assembler::ImplicitAddress Assembler::ConstantTable::loadValueAddress(V4IR::Const *c, +Assembler::ImplicitAddress Assembler::ConstantTable::loadValueAddress(IR::Const *c, RegisterID baseReg) { return loadValueAddress(convertToValue(c), baseReg); @@ -1575,8 +1574,8 @@ void Assembler::ConstantTable::finalize(JSC::LinkBuffer &linkBuffer, Instruction linkBuffer.patch(label, tablePtr); } -bool InstructionSelection::visitCJumpDouble(V4IR::AluOp op, V4IR::Expr *left, V4IR::Expr *right, - V4IR::BasicBlock *iftrue, V4IR::BasicBlock *iffalse) +bool InstructionSelection::visitCJumpDouble(IR::AluOp op, IR::Expr *left, IR::Expr *right, + IR::BasicBlock *iftrue, IR::BasicBlock *iffalse) { if (!isPregOrConst(left) || !isPregOrConst(right)) return false; @@ -1592,49 +1591,49 @@ bool InstructionSelection::visitCJumpDouble(V4IR::AluOp op, V4IR::Expr *left, V4 return true; } -void InstructionSelection::visitCJumpStrict(V4IR::Binop *binop, V4IR::BasicBlock *trueBlock, - V4IR::BasicBlock *falseBlock) +void InstructionSelection::visitCJumpStrict(IR::Binop *binop, IR::BasicBlock *trueBlock, + IR::BasicBlock *falseBlock) { - Q_ASSERT(binop->op == V4IR::OpStrictEqual || binop->op == V4IR::OpStrictNotEqual); + Q_ASSERT(binop->op == IR::OpStrictEqual || binop->op == IR::OpStrictNotEqual); - if (visitCJumpStrictNullUndefined(V4IR::NullType, binop, trueBlock, falseBlock)) + if (visitCJumpStrictNullUndefined(IR::NullType, binop, trueBlock, falseBlock)) return; - if (visitCJumpStrictNullUndefined(V4IR::UndefinedType, binop, trueBlock, falseBlock)) + if (visitCJumpStrictNullUndefined(IR::UndefinedType, binop, trueBlock, falseBlock)) return; if (visitCJumpStrictBool(binop, trueBlock, falseBlock)) return; - V4IR::Expr *left = binop->left; - V4IR::Expr *right = binop->right; + IR::Expr *left = binop->left; + IR::Expr *right = binop->right; _as->generateFunctionCallImp(Assembler::ReturnValueRegister, "__qmljs_cmp_se", __qmljs_cmp_se, Assembler::PointerToValue(left), Assembler::PointerToValue(right)); - _as->generateCJumpOnCompare(binop->op == V4IR::OpStrictEqual ? Assembler::NotEqual : Assembler::Equal, + _as->generateCJumpOnCompare(binop->op == IR::OpStrictEqual ? Assembler::NotEqual : Assembler::Equal, Assembler::ReturnValueRegister, Assembler::TrustedImm32(0), _block, trueBlock, falseBlock); } // Only load the non-null temp. -bool InstructionSelection::visitCJumpStrictNullUndefined(V4IR::Type nullOrUndef, V4IR::Binop *binop, - V4IR::BasicBlock *trueBlock, - V4IR::BasicBlock *falseBlock) +bool InstructionSelection::visitCJumpStrictNullUndefined(IR::Type nullOrUndef, IR::Binop *binop, + IR::BasicBlock *trueBlock, + IR::BasicBlock *falseBlock) { - Q_ASSERT(nullOrUndef == V4IR::NullType || nullOrUndef == V4IR::UndefinedType); + Q_ASSERT(nullOrUndef == IR::NullType || nullOrUndef == IR::UndefinedType); - V4IR::Expr *varSrc = 0; - if (binop->left->type == V4IR::VarType && binop->right->type == nullOrUndef) + IR::Expr *varSrc = 0; + if (binop->left->type == IR::VarType && binop->right->type == nullOrUndef) varSrc = binop->left; - else if (binop->left->type == nullOrUndef && binop->right->type == V4IR::VarType) + else if (binop->left->type == nullOrUndef && binop->right->type == IR::VarType) varSrc = binop->right; if (!varSrc) return false; - if (varSrc->asTemp() && varSrc->asTemp()->kind == V4IR::Temp::PhysicalRegister) { + if (varSrc->asTemp() && varSrc->asTemp()->kind == IR::Temp::PhysicalRegister) { _as->jumpToBlock(_block, falseBlock); return true; } - if (V4IR::Const *c = varSrc->asConst()) { + if (IR::Const *c = varSrc->asConst()) { if (c->type == nullOrUndef) _as->jumpToBlock(_block, trueBlock); else @@ -1642,7 +1641,7 @@ bool InstructionSelection::visitCJumpStrictNullUndefined(V4IR::Type nullOrUndef, return true; } - V4IR::Temp *t = varSrc->asTemp(); + IR::Temp *t = varSrc->asTemp(); Q_ASSERT(t); Assembler::Pointer tagAddr = _as->loadTempAddress(Assembler::ScratchRegister, t); @@ -1650,22 +1649,22 @@ bool InstructionSelection::visitCJumpStrictNullUndefined(V4IR::Type nullOrUndef, const Assembler::RegisterID tagReg = Assembler::ScratchRegister; _as->load32(tagAddr, tagReg); - Assembler::RelationalCondition cond = binop->op == V4IR::OpStrictEqual ? Assembler::Equal + Assembler::RelationalCondition cond = binop->op == IR::OpStrictEqual ? Assembler::Equal : Assembler::NotEqual; - const Assembler::TrustedImm32 tag(nullOrUndef == V4IR::NullType ? int(QV4::Value::_Null_Type) + const Assembler::TrustedImm32 tag(nullOrUndef == IR::NullType ? int(QV4::Value::_Null_Type) : int(QV4::Value::Undefined_Type)); _as->generateCJumpOnCompare(cond, tagReg, tag, _block, trueBlock, falseBlock); return true; } -bool InstructionSelection::visitCJumpStrictBool(V4IR::Binop *binop, V4IR::BasicBlock *trueBlock, - V4IR::BasicBlock *falseBlock) +bool InstructionSelection::visitCJumpStrictBool(IR::Binop *binop, IR::BasicBlock *trueBlock, + IR::BasicBlock *falseBlock) { - V4IR::Expr *boolSrc = 0, *otherSrc = 0; - if (binop->left->type == V4IR::BoolType) { + IR::Expr *boolSrc = 0, *otherSrc = 0; + if (binop->left->type == IR::BoolType) { boolSrc = binop->left; otherSrc = binop->right; - } else if (binop->right->type == V4IR::BoolType) { + } else if (binop->right->type == IR::BoolType) { boolSrc = binop->right; otherSrc = binop->left; } else { @@ -1673,24 +1672,24 @@ bool InstructionSelection::visitCJumpStrictBool(V4IR::Binop *binop, V4IR::BasicB return false; } - Assembler::RelationalCondition cond = binop->op == V4IR::OpStrictEqual ? Assembler::Equal + Assembler::RelationalCondition cond = binop->op == IR::OpStrictEqual ? Assembler::Equal : Assembler::NotEqual; - if (otherSrc->type == V4IR::BoolType) { // both are boolean + if (otherSrc->type == IR::BoolType) { // both are boolean Assembler::RegisterID one = _as->toBoolRegister(boolSrc, Assembler::ReturnValueRegister); Assembler::RegisterID two = _as->toBoolRegister(otherSrc, Assembler::ScratchRegister); _as->generateCJumpOnCompare(cond, one, two, _block, trueBlock, falseBlock); return true; } - if (otherSrc->type != V4IR::VarType) { + if (otherSrc->type != IR::VarType) { _as->jumpToBlock(_block, falseBlock); return true; } - V4IR::Temp *otherTemp = otherSrc->asTemp(); + IR::Temp *otherTemp = otherSrc->asTemp(); Q_ASSERT(otherTemp); // constants cannot have "var" type - Q_ASSERT(otherTemp->kind != V4IR::Temp::PhysicalRegister); + Q_ASSERT(otherTemp->kind != IR::Temp::PhysicalRegister); Assembler::Pointer otherAddr = _as->loadTempAddress(Assembler::ReturnValueRegister, otherTemp); otherAddr.offset += 4; // tag address @@ -1699,7 +1698,7 @@ bool InstructionSelection::visitCJumpStrictBool(V4IR::Binop *binop, V4IR::BasicB _as->load32(otherAddr, Assembler::ScratchRegister); Assembler::Jump noBool = _as->branch32(Assembler::NotEqual, Assembler::ScratchRegister, Assembler::TrustedImm32(QV4::Value::_Boolean_Type)); - if (binop->op == V4IR::OpStrictEqual) + if (binop->op == IR::OpStrictEqual) _as->addPatch(falseBlock, noBool); else _as->addPatch(trueBlock, noBool); @@ -1713,26 +1712,26 @@ bool InstructionSelection::visitCJumpStrictBool(V4IR::Binop *binop, V4IR::BasicB return true; } -bool InstructionSelection::visitCJumpNullUndefined(V4IR::Type nullOrUndef, V4IR::Binop *binop, - V4IR::BasicBlock *trueBlock, - V4IR::BasicBlock *falseBlock) +bool InstructionSelection::visitCJumpNullUndefined(IR::Type nullOrUndef, IR::Binop *binop, + IR::BasicBlock *trueBlock, + IR::BasicBlock *falseBlock) { - Q_ASSERT(nullOrUndef == V4IR::NullType || nullOrUndef == V4IR::UndefinedType); + Q_ASSERT(nullOrUndef == IR::NullType || nullOrUndef == IR::UndefinedType); - V4IR::Expr *varSrc = 0; - if (binop->left->type == V4IR::VarType && binop->right->type == nullOrUndef) + IR::Expr *varSrc = 0; + if (binop->left->type == IR::VarType && binop->right->type == nullOrUndef) varSrc = binop->left; - else if (binop->left->type == nullOrUndef && binop->right->type == V4IR::VarType) + else if (binop->left->type == nullOrUndef && binop->right->type == IR::VarType) varSrc = binop->right; if (!varSrc) return false; - if (varSrc->asTemp() && varSrc->asTemp()->kind == V4IR::Temp::PhysicalRegister) { + if (varSrc->asTemp() && varSrc->asTemp()->kind == IR::Temp::PhysicalRegister) { _as->jumpToBlock(_block, falseBlock); return true; } - if (V4IR::Const *c = varSrc->asConst()) { + if (IR::Const *c = varSrc->asConst()) { if (c->type == nullOrUndef) _as->jumpToBlock(_block, trueBlock); else @@ -1740,7 +1739,7 @@ bool InstructionSelection::visitCJumpNullUndefined(V4IR::Type nullOrUndef, V4IR: return true; } - V4IR::Temp *t = varSrc->asTemp(); + IR::Temp *t = varSrc->asTemp(); Q_ASSERT(t); Assembler::Pointer tagAddr = _as->loadTempAddress(Assembler::ScratchRegister, t); @@ -1748,7 +1747,7 @@ bool InstructionSelection::visitCJumpNullUndefined(V4IR::Type nullOrUndef, V4IR: const Assembler::RegisterID tagReg = Assembler::ScratchRegister; _as->load32(tagAddr, tagReg); - if (binop->op == V4IR::OpNotEqual) + if (binop->op == IR::OpNotEqual) qSwap(trueBlock, falseBlock); Assembler::Jump isNull = _as->branch32(Assembler::Equal, tagReg, Assembler::TrustedImm32(int(QV4::Value::_Null_Type))); Assembler::Jump isUndefined = _as->branch32(Assembler::Equal, tagReg, Assembler::TrustedImm32(int(QV4::Value::Undefined_Type))); @@ -1760,20 +1759,20 @@ bool InstructionSelection::visitCJumpNullUndefined(V4IR::Type nullOrUndef, V4IR: } -void InstructionSelection::visitCJumpEqual(V4IR::Binop *binop, V4IR::BasicBlock *trueBlock, - V4IR::BasicBlock *falseBlock) +void InstructionSelection::visitCJumpEqual(IR::Binop *binop, IR::BasicBlock *trueBlock, + IR::BasicBlock *falseBlock) { - Q_ASSERT(binop->op == V4IR::OpEqual || binop->op == V4IR::OpNotEqual); + Q_ASSERT(binop->op == IR::OpEqual || binop->op == IR::OpNotEqual); - if (visitCJumpNullUndefined(V4IR::NullType, binop, trueBlock, falseBlock)) + if (visitCJumpNullUndefined(IR::NullType, binop, trueBlock, falseBlock)) return; - V4IR::Expr *left = binop->left; - V4IR::Expr *right = binop->right; + IR::Expr *left = binop->left; + IR::Expr *right = binop->right; _as->generateFunctionCallImp(Assembler::ReturnValueRegister, "__qmljs_cmp_eq", __qmljs_cmp_eq, Assembler::PointerToValue(left), Assembler::PointerToValue(right)); - _as->generateCJumpOnCompare(binop->op == V4IR::OpEqual ? Assembler::NotEqual : Assembler::Equal, + _as->generateCJumpOnCompare(binop->op == IR::OpEqual ? Assembler::NotEqual : Assembler::Equal, Assembler::ReturnValueRegister, Assembler::TrustedImm32(0), _block, trueBlock, falseBlock); } diff --git a/src/qml/jit/qv4isel_masm_p.h b/src/qml/jit/qv4isel_masm_p.h index b6af385887..69317cb062 100644 --- a/src/qml/jit/qv4isel_masm_p.h +++ b/src/qml/jit/qv4isel_masm_p.h @@ -59,15 +59,15 @@ QT_BEGIN_NAMESPACE -namespace QQmlJS { -namespace MASM { +namespace QV4 { +namespace JIT { class Q_QML_EXPORT InstructionSelection: - protected V4IR::IRDecoder, + protected IR::IRDecoder, public EvalInstructionSelection { public: - InstructionSelection(QQmlEnginePrivate *qmlEngine, QV4::ExecutableAllocator *execAllocator, V4IR::Module *module, QV4::Compiler::JSUnitGenerator *jsGenerator); + InstructionSelection(QQmlEnginePrivate *qmlEngine, QV4::ExecutableAllocator *execAllocator, IR::Module *module, QV4::Compiler::JSUnitGenerator *jsGenerator); ~InstructionSelection(); virtual void run(int functionIndex); @@ -76,56 +76,56 @@ public: protected: virtual QV4::CompiledData::CompilationUnit *backendCompileStep(); - virtual void callBuiltinInvalid(V4IR::Name *func, V4IR::ExprList *args, V4IR::Temp *result); - virtual void callBuiltinTypeofMember(V4IR::Expr *base, const QString &name, V4IR::Temp *result); - virtual void callBuiltinTypeofSubscript(V4IR::Expr *base, V4IR::Expr *index, V4IR::Temp *result); - virtual void callBuiltinTypeofName(const QString &name, V4IR::Temp *result); - virtual void callBuiltinTypeofValue(V4IR::Expr *value, V4IR::Temp *result); - virtual void callBuiltinDeleteMember(V4IR::Temp *base, const QString &name, V4IR::Temp *result); - virtual void callBuiltinDeleteSubscript(V4IR::Temp *base, V4IR::Expr *index, V4IR::Temp *result); - virtual void callBuiltinDeleteName(const QString &name, V4IR::Temp *result); - virtual void callBuiltinDeleteValue(V4IR::Temp *result); - virtual void callBuiltinThrow(V4IR::Expr *arg); + virtual void callBuiltinInvalid(IR::Name *func, IR::ExprList *args, IR::Temp *result); + virtual void callBuiltinTypeofMember(IR::Expr *base, const QString &name, IR::Temp *result); + virtual void callBuiltinTypeofSubscript(IR::Expr *base, IR::Expr *index, IR::Temp *result); + virtual void callBuiltinTypeofName(const QString &name, IR::Temp *result); + virtual void callBuiltinTypeofValue(IR::Expr *value, IR::Temp *result); + virtual void callBuiltinDeleteMember(IR::Temp *base, const QString &name, IR::Temp *result); + virtual void callBuiltinDeleteSubscript(IR::Temp *base, IR::Expr *index, IR::Temp *result); + virtual void callBuiltinDeleteName(const QString &name, IR::Temp *result); + virtual void callBuiltinDeleteValue(IR::Temp *result); + virtual void callBuiltinThrow(IR::Expr *arg); virtual void callBuiltinReThrow(); - virtual void callBuiltinUnwindException(V4IR::Temp *); + virtual void callBuiltinUnwindException(IR::Temp *); virtual void callBuiltinPushCatchScope(const QString &exceptionName); - virtual void callBuiltinForeachIteratorObject(V4IR::Temp *arg, V4IR::Temp *result); - virtual void callBuiltinForeachNextPropertyname(V4IR::Temp *arg, V4IR::Temp *result); - virtual void callBuiltinPushWithScope(V4IR::Temp *arg); + virtual void callBuiltinForeachIteratorObject(IR::Temp *arg, IR::Temp *result); + virtual void callBuiltinForeachNextPropertyname(IR::Temp *arg, IR::Temp *result); + virtual void callBuiltinPushWithScope(IR::Temp *arg); virtual void callBuiltinPopScope(); virtual void callBuiltinDeclareVar(bool deletable, const QString &name); - virtual void callBuiltinDefineGetterSetter(V4IR::Temp *object, const QString &name, V4IR::Temp *getter, V4IR::Temp *setter); - virtual void callBuiltinDefineProperty(V4IR::Temp *object, const QString &name, V4IR::Expr *value); - virtual void callBuiltinDefineArray(V4IR::Temp *result, V4IR::ExprList *args); - virtual void callBuiltinDefineObjectLiteral(V4IR::Temp *result, V4IR::ExprList *args); - virtual void callBuiltinSetupArgumentObject(V4IR::Temp *result); + virtual void callBuiltinDefineGetterSetter(IR::Temp *object, const QString &name, IR::Temp *getter, IR::Temp *setter); + virtual void callBuiltinDefineProperty(IR::Temp *object, const QString &name, IR::Expr *value); + virtual void callBuiltinDefineArray(IR::Temp *result, IR::ExprList *args); + virtual void callBuiltinDefineObjectLiteral(IR::Temp *result, IR::ExprList *args); + virtual void callBuiltinSetupArgumentObject(IR::Temp *result); virtual void callBuiltinConvertThisToObject(); - virtual void callValue(V4IR::Temp *value, V4IR::ExprList *args, V4IR::Temp *result); - virtual void callProperty(V4IR::Expr *base, const QString &name, V4IR::ExprList *args, V4IR::Temp *result); - virtual void callSubscript(V4IR::Expr *base, V4IR::Expr *index, V4IR::ExprList *args, V4IR::Temp *result); - virtual void convertType(V4IR::Temp *source, V4IR::Temp *target); - virtual void loadThisObject(V4IR::Temp *temp); - virtual void loadQmlIdArray(V4IR::Temp *temp); - virtual void loadQmlImportedScripts(V4IR::Temp *temp); - virtual void loadQmlContextObject(V4IR::Temp *temp); - virtual void loadQmlScopeObject(V4IR::Temp *temp); - virtual void loadQmlSingleton(const QString &name, V4IR::Temp *temp); - virtual void loadConst(V4IR::Const *sourceConst, V4IR::Temp *targetTemp); - virtual void loadString(const QString &str, V4IR::Temp *targetTemp); - virtual void loadRegexp(V4IR::RegExp *sourceRegexp, V4IR::Temp *targetTemp); - virtual void getActivationProperty(const V4IR::Name *name, V4IR::Temp *temp); - virtual void setActivationProperty(V4IR::Expr *source, const QString &targetName); - virtual void initClosure(V4IR::Closure *closure, V4IR::Temp *target); - virtual void getProperty(V4IR::Expr *base, const QString &name, V4IR::Temp *target); - virtual void setProperty(V4IR::Expr *source, V4IR::Expr *targetBase, const QString &targetName); - virtual void setQObjectProperty(V4IR::Expr *source, V4IR::Expr *targetBase, int propertyIndex); - virtual void getQObjectProperty(V4IR::Expr *base, int propertyIndex, bool captureRequired, int attachedPropertiesId, V4IR::Temp *target); - virtual void getElement(V4IR::Expr *base, V4IR::Expr *index, V4IR::Temp *target); - virtual void setElement(V4IR::Expr *source, V4IR::Expr *targetBase, V4IR::Expr *targetIndex); - virtual void copyValue(V4IR::Temp *sourceTemp, V4IR::Temp *targetTemp); - virtual void swapValues(V4IR::Temp *sourceTemp, V4IR::Temp *targetTemp); - virtual void unop(V4IR::AluOp oper, V4IR::Temp *sourceTemp, V4IR::Temp *targetTemp); - virtual void binop(V4IR::AluOp oper, V4IR::Expr *leftSource, V4IR::Expr *rightSource, V4IR::Temp *target); + virtual void callValue(IR::Temp *value, IR::ExprList *args, IR::Temp *result); + virtual void callProperty(IR::Expr *base, const QString &name, IR::ExprList *args, IR::Temp *result); + virtual void callSubscript(IR::Expr *base, IR::Expr *index, IR::ExprList *args, IR::Temp *result); + virtual void convertType(IR::Temp *source, IR::Temp *target); + virtual void loadThisObject(IR::Temp *temp); + virtual void loadQmlIdArray(IR::Temp *temp); + virtual void loadQmlImportedScripts(IR::Temp *temp); + virtual void loadQmlContextObject(IR::Temp *temp); + virtual void loadQmlScopeObject(IR::Temp *temp); + virtual void loadQmlSingleton(const QString &name, IR::Temp *temp); + virtual void loadConst(IR::Const *sourceConst, IR::Temp *targetTemp); + virtual void loadString(const QString &str, IR::Temp *targetTemp); + virtual void loadRegexp(IR::RegExp *sourceRegexp, IR::Temp *targetTemp); + virtual void getActivationProperty(const IR::Name *name, IR::Temp *temp); + virtual void setActivationProperty(IR::Expr *source, const QString &targetName); + virtual void initClosure(IR::Closure *closure, IR::Temp *target); + virtual void getProperty(IR::Expr *base, const QString &name, IR::Temp *target); + virtual void setProperty(IR::Expr *source, IR::Expr *targetBase, const QString &targetName); + virtual void setQObjectProperty(IR::Expr *source, IR::Expr *targetBase, int propertyIndex); + virtual void getQObjectProperty(IR::Expr *base, int propertyIndex, bool captureRequired, int attachedPropertiesId, IR::Temp *target); + virtual void getElement(IR::Expr *base, IR::Expr *index, IR::Temp *target); + virtual void setElement(IR::Expr *source, IR::Expr *targetBase, IR::Expr *targetIndex); + virtual void copyValue(IR::Temp *sourceTemp, IR::Temp *targetTemp); + virtual void swapValues(IR::Temp *sourceTemp, IR::Temp *targetTemp); + virtual void unop(IR::AluOp oper, IR::Temp *sourceTemp, IR::Temp *targetTemp); + virtual void binop(IR::AluOp oper, IR::Expr *leftSource, IR::Expr *rightSource, IR::Temp *target); typedef Assembler::Address Address; typedef Assembler::Pointer Pointer; @@ -150,34 +150,34 @@ protected: return _as->stackLayout().callDataAddress(); } - virtual void constructActivationProperty(V4IR::Name *func, V4IR::ExprList *args, V4IR::Temp *result); - virtual void constructProperty(V4IR::Temp *base, const QString &name, V4IR::ExprList *args, V4IR::Temp *result); - virtual void constructValue(V4IR::Temp *value, V4IR::ExprList *args, V4IR::Temp *result); + virtual void constructActivationProperty(IR::Name *func, IR::ExprList *args, IR::Temp *result); + virtual void constructProperty(IR::Temp *base, const QString &name, IR::ExprList *args, IR::Temp *result); + virtual void constructValue(IR::Temp *value, IR::ExprList *args, IR::Temp *result); - virtual void visitJump(V4IR::Jump *); - virtual void visitCJump(V4IR::CJump *); - virtual void visitRet(V4IR::Ret *); + virtual void visitJump(IR::Jump *); + virtual void visitCJump(IR::CJump *); + virtual void visitRet(IR::Ret *); - bool visitCJumpDouble(V4IR::AluOp op, V4IR::Expr *left, V4IR::Expr *right, - V4IR::BasicBlock *iftrue, V4IR::BasicBlock *iffalse); - void visitCJumpStrict(V4IR::Binop *binop, V4IR::BasicBlock *trueBlock, V4IR::BasicBlock *falseBlock); - bool visitCJumpStrictNullUndefined(V4IR::Type nullOrUndef, V4IR::Binop *binop, - V4IR::BasicBlock *trueBlock, V4IR::BasicBlock *falseBlock); - bool visitCJumpStrictBool(V4IR::Binop *binop, V4IR::BasicBlock *trueBlock, V4IR::BasicBlock *falseBlock); - bool visitCJumpNullUndefined(V4IR::Type nullOrUndef, V4IR::Binop *binop, - V4IR::BasicBlock *trueBlock, V4IR::BasicBlock *falseBlock); - void visitCJumpEqual(V4IR::Binop *binop, V4IR::BasicBlock *trueBlock, V4IR::BasicBlock *falseBlock); + bool visitCJumpDouble(IR::AluOp op, IR::Expr *left, IR::Expr *right, + IR::BasicBlock *iftrue, IR::BasicBlock *iffalse); + void visitCJumpStrict(IR::Binop *binop, IR::BasicBlock *trueBlock, IR::BasicBlock *falseBlock); + bool visitCJumpStrictNullUndefined(IR::Type nullOrUndef, IR::Binop *binop, + IR::BasicBlock *trueBlock, IR::BasicBlock *falseBlock); + bool visitCJumpStrictBool(IR::Binop *binop, IR::BasicBlock *trueBlock, IR::BasicBlock *falseBlock); + bool visitCJumpNullUndefined(IR::Type nullOrUndef, IR::Binop *binop, + IR::BasicBlock *trueBlock, IR::BasicBlock *falseBlock); + void visitCJumpEqual(IR::Binop *binop, IR::BasicBlock *trueBlock, IR::BasicBlock *falseBlock); private: - void convertTypeSlowPath(V4IR::Temp *source, V4IR::Temp *target); - void convertTypeToDouble(V4IR::Temp *source, V4IR::Temp *target); - void convertTypeToBool(V4IR::Temp *source, V4IR::Temp *target); - void convertTypeToSInt32(V4IR::Temp *source, V4IR::Temp *target); - void convertTypeToUInt32(V4IR::Temp *source, V4IR::Temp *target); + void convertTypeSlowPath(IR::Temp *source, IR::Temp *target); + void convertTypeToDouble(IR::Temp *source, IR::Temp *target); + void convertTypeToBool(IR::Temp *source, IR::Temp *target); + void convertTypeToSInt32(IR::Temp *source, IR::Temp *target); + void convertTypeToUInt32(IR::Temp *source, IR::Temp *target); - void convertIntToDouble(V4IR::Temp *source, V4IR::Temp *target) + void convertIntToDouble(IR::Temp *source, IR::Temp *target) { - if (target->kind == V4IR::Temp::PhysicalRegister) { + if (target->kind == IR::Temp::PhysicalRegister) { _as->convertInt32ToDouble(_as->toInt32Register(source, Assembler::ScratchRegister), (Assembler::FPRegisterID) target->index); } else { @@ -187,12 +187,12 @@ private: } } - void convertUIntToDouble(V4IR::Temp *source, V4IR::Temp *target) + void convertUIntToDouble(IR::Temp *source, IR::Temp *target) { Assembler::RegisterID tmpReg = Assembler::ScratchRegister; Assembler::RegisterID reg = _as->toInt32Register(source, tmpReg); - if (target->kind == V4IR::Temp::PhysicalRegister) { + if (target->kind == IR::Temp::PhysicalRegister) { _as->convertUInt32ToDouble(reg, (Assembler::FPRegisterID) target->index, tmpReg); } else { _as->convertUInt32ToDouble(_as->toUInt32Register(source, tmpReg), @@ -201,9 +201,9 @@ private: } } - void convertIntToBool(V4IR::Temp *source, V4IR::Temp *target) + void convertIntToBool(IR::Temp *source, IR::Temp *target) { - Assembler::RegisterID reg = target->kind == V4IR::Temp::PhysicalRegister + Assembler::RegisterID reg = target->kind == IR::Temp::PhysicalRegister ? (Assembler::RegisterID) target->index : Assembler::ScratchRegister; @@ -218,8 +218,8 @@ private: #define generateFunctionCall(t, function, ...) \ _as->generateFunctionCallImp(t, isel_stringIfy(function), function, __VA_ARGS__) - int prepareVariableArguments(V4IR::ExprList* args); - int prepareCallData(V4IR::ExprList* args, V4IR::Expr *thisObject); + int prepareVariableArguments(IR::ExprList* args); + int prepareCallData(IR::ExprList* args, IR::Expr *thisObject); template <typename Retval, typename Arg1, typename Arg2, typename Arg3> void generateLookupCall(Retval retval, uint index, uint getterSetterOffset, Arg1 arg1, Arg2 arg2, Arg3 arg3) @@ -245,8 +245,8 @@ private: generateLookupCall(retval, index, getterSetterOffset, arg1, arg2, Assembler::VoidType()); } - V4IR::BasicBlock *_block; - QSet<V4IR::Jump *> _removableJumps; + IR::BasicBlock *_block; + QSet<IR::Jump *> _removableJumps; Assembler* _as; CompilationUnit *compilationUnit; @@ -257,14 +257,14 @@ class Q_QML_EXPORT ISelFactory: public EvalISelFactory { public: virtual ~ISelFactory() {} - virtual EvalInstructionSelection *create(QQmlEnginePrivate *qmlEngine, QV4::ExecutableAllocator *execAllocator, V4IR::Module *module, QV4::Compiler::JSUnitGenerator *jsGenerator) + virtual EvalInstructionSelection *create(QQmlEnginePrivate *qmlEngine, QV4::ExecutableAllocator *execAllocator, IR::Module *module, QV4::Compiler::JSUnitGenerator *jsGenerator) { return new InstructionSelection(qmlEngine, execAllocator, module, jsGenerator); } virtual bool jitCompileRegexps() const { return true; } }; -} // end of namespace MASM -} // end of namespace QQmlJS +} // end of namespace JIT +} // end of namespace QV4 QT_END_NAMESPACE diff --git a/src/qml/jit/qv4regalloc.cpp b/src/qml/jit/qv4regalloc.cpp index cc9ce4fc96..4ff03611fa 100644 --- a/src/qml/jit/qv4regalloc.cpp +++ b/src/qml/jit/qv4regalloc.cpp @@ -63,10 +63,10 @@ QT_BEGIN_NAMESPACE Q_DECLARE_TYPEINFO(Use, Q_MOVABLE_TYPE); -using namespace QQmlJS::V4IR; +using namespace QV4::IR; -namespace QQmlJS { -namespace MASM { +namespace QV4 { +namespace JIT { class RegAllocInfo: public IRDecoder { @@ -95,7 +95,7 @@ class RegAllocInfo: public IRDecoder public: RegAllocInfo(): _currentStmt(0) {} - void collect(Function *function) + void collect(IR::Function *function) { foreach (BasicBlock *bb, function->basicBlocks) { foreach (Stmt *s, bb->statements) { @@ -194,33 +194,33 @@ public: #endif // DEBUG_REGALLOC protected: // IRDecoder - virtual void callBuiltinInvalid(V4IR::Name *, V4IR::ExprList *, V4IR::Temp *) {} - virtual void callBuiltinTypeofMember(V4IR::Expr *, const QString &, V4IR::Temp *) {} - virtual void callBuiltinTypeofSubscript(V4IR::Expr *, V4IR::Expr *, V4IR::Temp *) {} - virtual void callBuiltinTypeofName(const QString &, V4IR::Temp *) {} - virtual void callBuiltinTypeofValue(V4IR::Expr *, V4IR::Temp *) {} - virtual void callBuiltinDeleteMember(V4IR::Temp *, const QString &, V4IR::Temp *) {} - virtual void callBuiltinDeleteSubscript(V4IR::Temp *, V4IR::Expr *, V4IR::Temp *) {} - virtual void callBuiltinDeleteName(const QString &, V4IR::Temp *) {} - virtual void callBuiltinDeleteValue(V4IR::Temp *) {} - virtual void callBuiltinThrow(V4IR::Expr *) {} + virtual void callBuiltinInvalid(IR::Name *, IR::ExprList *, IR::Temp *) {} + virtual void callBuiltinTypeofMember(IR::Expr *, const QString &, IR::Temp *) {} + virtual void callBuiltinTypeofSubscript(IR::Expr *, IR::Expr *, IR::Temp *) {} + virtual void callBuiltinTypeofName(const QString &, IR::Temp *) {} + virtual void callBuiltinTypeofValue(IR::Expr *, IR::Temp *) {} + virtual void callBuiltinDeleteMember(IR::Temp *, const QString &, IR::Temp *) {} + virtual void callBuiltinDeleteSubscript(IR::Temp *, IR::Expr *, IR::Temp *) {} + virtual void callBuiltinDeleteName(const QString &, IR::Temp *) {} + virtual void callBuiltinDeleteValue(IR::Temp *) {} + virtual void callBuiltinThrow(IR::Expr *) {} virtual void callBuiltinReThrow() {} - virtual void callBuiltinUnwindException(V4IR::Temp *) {} + virtual void callBuiltinUnwindException(IR::Temp *) {} virtual void callBuiltinPushCatchScope(const QString &) {}; - virtual void callBuiltinForeachIteratorObject(V4IR::Temp *, V4IR::Temp *) {} - virtual void callBuiltinForeachNextProperty(V4IR::Temp *, V4IR::Temp *) {} - virtual void callBuiltinForeachNextPropertyname(V4IR::Temp *, V4IR::Temp *) {} - virtual void callBuiltinPushWithScope(V4IR::Temp *) {} + virtual void callBuiltinForeachIteratorObject(IR::Temp *, IR::Temp *) {} + virtual void callBuiltinForeachNextProperty(IR::Temp *, IR::Temp *) {} + virtual void callBuiltinForeachNextPropertyname(IR::Temp *, IR::Temp *) {} + virtual void callBuiltinPushWithScope(IR::Temp *) {} virtual void callBuiltinPopScope() {} virtual void callBuiltinDeclareVar(bool , const QString &) {} - virtual void callBuiltinDefineGetterSetter(V4IR::Temp *, const QString &, V4IR::Temp *, V4IR::Temp *) {} - virtual void callBuiltinDefineProperty(V4IR::Temp *, const QString &, V4IR::Expr *) {} - virtual void callBuiltinDefineArray(V4IR::Temp *, V4IR::ExprList *) {} - virtual void callBuiltinDefineObjectLiteral(V4IR::Temp *, V4IR::ExprList *) {} - virtual void callBuiltinSetupArgumentObject(V4IR::Temp *) {} + virtual void callBuiltinDefineGetterSetter(IR::Temp *, const QString &, IR::Temp *, IR::Temp *) {} + virtual void callBuiltinDefineProperty(IR::Temp *, const QString &, IR::Expr *) {} + virtual void callBuiltinDefineArray(IR::Temp *, IR::ExprList *) {} + virtual void callBuiltinDefineObjectLiteral(IR::Temp *, IR::ExprList *) {} + virtual void callBuiltinSetupArgumentObject(IR::Temp *) {} virtual void callBuiltinConvertThisToObject() {} - virtual void callValue(V4IR::Temp *value, V4IR::ExprList *args, V4IR::Temp *result) + virtual void callValue(IR::Temp *value, IR::ExprList *args, IR::Temp *result) { addDef(result); addUses(value, Use::CouldHaveRegister); @@ -228,8 +228,8 @@ protected: // IRDecoder addCall(); } - virtual void callProperty(V4IR::Expr *base, const QString &name, V4IR::ExprList *args, - V4IR::Temp *result) + virtual void callProperty(IR::Expr *base, const QString &name, IR::ExprList *args, + IR::Temp *result) { Q_UNUSED(name) @@ -239,8 +239,8 @@ protected: // IRDecoder addCall(); } - virtual void callSubscript(V4IR::Expr *base, V4IR::Expr *index, V4IR::ExprList *args, - V4IR::Temp *result) + virtual void callSubscript(IR::Expr *base, IR::Expr *index, IR::ExprList *args, + IR::Temp *result) { addDef(result); addUses(base->asTemp(), Use::CouldHaveRegister); @@ -249,7 +249,7 @@ protected: // IRDecoder addCall(); } - virtual void convertType(V4IR::Temp *source, V4IR::Temp *target) + virtual void convertType(IR::Temp *source, IR::Temp *target) { addDef(target); @@ -320,14 +320,14 @@ protected: // IRDecoder addHint(target, source); } - virtual void constructActivationProperty(V4IR::Name *, V4IR::ExprList *args, V4IR::Temp *result) + virtual void constructActivationProperty(IR::Name *, IR::ExprList *args, IR::Temp *result) { addDef(result); addUses(args, Use::CouldHaveRegister); addCall(); } - virtual void constructProperty(V4IR::Temp *base, const QString &, V4IR::ExprList *args, V4IR::Temp *result) + virtual void constructProperty(IR::Temp *base, const QString &, IR::ExprList *args, IR::Temp *result) { addDef(result); addUses(base, Use::CouldHaveRegister); @@ -335,7 +335,7 @@ protected: // IRDecoder addCall(); } - virtual void constructValue(V4IR::Temp *value, V4IR::ExprList *args, V4IR::Temp *result) + virtual void constructValue(IR::Temp *value, IR::ExprList *args, IR::Temp *result) { addDef(result); addUses(value, Use::CouldHaveRegister); @@ -343,18 +343,18 @@ protected: // IRDecoder addCall(); } - virtual void loadThisObject(V4IR::Temp *temp) + virtual void loadThisObject(IR::Temp *temp) { addDef(temp); } - virtual void loadQmlIdArray(V4IR::Temp *temp) + virtual void loadQmlIdArray(IR::Temp *temp) { addDef(temp); addCall(); } - virtual void loadQmlImportedScripts(V4IR::Temp *temp) + virtual void loadQmlImportedScripts(IR::Temp *temp) { addDef(temp); addCall(); @@ -382,21 +382,21 @@ protected: // IRDecoder addCall(); } - virtual void loadConst(V4IR::Const *sourceConst, V4IR::Temp *targetTemp) + virtual void loadConst(IR::Const *sourceConst, IR::Temp *targetTemp) { Q_UNUSED(sourceConst); addDef(targetTemp); } - virtual void loadString(const QString &str, V4IR::Temp *targetTemp) + virtual void loadString(const QString &str, IR::Temp *targetTemp) { Q_UNUSED(str); addDef(targetTemp); } - virtual void loadRegexp(V4IR::RegExp *sourceRegexp, V4IR::Temp *targetTemp) + virtual void loadRegexp(IR::RegExp *sourceRegexp, IR::Temp *targetTemp) { Q_UNUSED(sourceRegexp); @@ -404,19 +404,19 @@ protected: // IRDecoder addCall(); } - virtual void getActivationProperty(const V4IR::Name *, V4IR::Temp *temp) + virtual void getActivationProperty(const IR::Name *, IR::Temp *temp) { addDef(temp); addCall(); } - virtual void setActivationProperty(V4IR::Expr *source, const QString &) + virtual void setActivationProperty(IR::Expr *source, const QString &) { addUses(source->asTemp(), Use::CouldHaveRegister); addCall(); } - virtual void initClosure(V4IR::Closure *closure, V4IR::Temp *target) + virtual void initClosure(IR::Closure *closure, IR::Temp *target) { Q_UNUSED(closure); @@ -424,35 +424,35 @@ protected: // IRDecoder addCall(); } - virtual void getProperty(V4IR::Expr *base, const QString &, V4IR::Temp *target) + virtual void getProperty(IR::Expr *base, const QString &, IR::Temp *target) { addDef(target); addUses(base->asTemp(), Use::CouldHaveRegister); addCall(); } - virtual void setProperty(V4IR::Expr *source, V4IR::Expr *targetBase, const QString &) + virtual void setProperty(IR::Expr *source, IR::Expr *targetBase, const QString &) { addUses(source->asTemp(), Use::CouldHaveRegister); addUses(targetBase->asTemp(), Use::CouldHaveRegister); addCall(); } - virtual void setQObjectProperty(V4IR::Expr *source, V4IR::Expr *targetBase, int /*propertyIndex*/) + virtual void setQObjectProperty(IR::Expr *source, IR::Expr *targetBase, int /*propertyIndex*/) { addUses(source->asTemp(), Use::CouldHaveRegister); addUses(targetBase->asTemp(), Use::CouldHaveRegister); addCall(); } - virtual void getQObjectProperty(V4IR::Expr *base, int /*propertyIndex*/, bool /*captureRequired*/, int /*attachedPropertiesId*/, V4IR::Temp *target) + virtual void getQObjectProperty(IR::Expr *base, int /*propertyIndex*/, bool /*captureRequired*/, int /*attachedPropertiesId*/, IR::Temp *target) { addDef(target); addUses(base->asTemp(), Use::CouldHaveRegister); addCall(); } - virtual void getElement(V4IR::Expr *base, V4IR::Expr *index, V4IR::Temp *target) + virtual void getElement(IR::Expr *base, IR::Expr *index, IR::Temp *target) { addDef(target); addUses(base->asTemp(), Use::CouldHaveRegister); @@ -460,7 +460,7 @@ protected: // IRDecoder addCall(); } - virtual void setElement(V4IR::Expr *source, V4IR::Expr *targetBase, V4IR::Expr *targetIndex) + virtual void setElement(IR::Expr *source, IR::Expr *targetBase, IR::Expr *targetIndex) { addUses(source->asTemp(), Use::CouldHaveRegister); addUses(targetBase->asTemp(), Use::CouldHaveRegister); @@ -468,14 +468,14 @@ protected: // IRDecoder addCall(); } - virtual void copyValue(V4IR::Temp *sourceTemp, V4IR::Temp *targetTemp) + virtual void copyValue(IR::Temp *sourceTemp, IR::Temp *targetTemp) { addDef(targetTemp); addUses(sourceTemp, Use::CouldHaveRegister); addHint(targetTemp, sourceTemp); } - virtual void swapValues(V4IR::Temp *, V4IR::Temp *) + virtual void swapValues(IR::Temp *, IR::Temp *) { // Inserted by the register allocator, so it cannot occur here. Q_UNREACHABLE(); @@ -486,7 +486,7 @@ protected: // IRDecoder addDef(targetTemp); bool needsCall = true; - if (oper == OpNot && sourceTemp->type == V4IR::BoolType && targetTemp->type == V4IR::BoolType) + if (oper == OpNot && sourceTemp->type == IR::BoolType && targetTemp->type == IR::BoolType) needsCall = false; #if 0 // TODO: change masm to generate code @@ -561,8 +561,8 @@ protected: // IRDecoder } } - virtual void visitJump(V4IR::Jump *) {} - virtual void visitCJump(V4IR::CJump *s) + virtual void visitJump(IR::Jump *) {} + virtual void visitCJump(IR::CJump *s) { if (Temp *t = s->cond->asTemp()) { #if 0 // TODO: change masm to generate code @@ -582,10 +582,10 @@ protected: // IRDecoder } } - virtual void visitRet(V4IR::Ret *s) + virtual void visitRet(IR::Ret *s) { addUses(s->expr->asTemp(), Use::CouldHaveRegister); } - virtual void visitPhi(V4IR::Phi *s) + virtual void visitPhi(IR::Phi *s) { addDef(s->targetTemp, true); foreach (Expr *e, s->d->incoming) { @@ -597,7 +597,7 @@ protected: // IRDecoder } protected: - virtual void callBuiltin(V4IR::Call *c, V4IR::Temp *result) + virtual void callBuiltin(IR::Call *c, IR::Temp *result) { addDef(result); addUses(c->base->asTemp(), Use::CouldHaveRegister); @@ -656,26 +656,26 @@ private: } }; -} // MASM namespace -} // MOTH namespace +} // JIT namespace +} // QV4 namespace QT_END_NAMESPACE QT_USE_NAMESPACE -using namespace QT_PREPEND_NAMESPACE(QQmlJS::MASM); -using namespace QT_PREPEND_NAMESPACE(QQmlJS::V4IR); -using namespace QT_PREPEND_NAMESPACE(QQmlJS); +using namespace QT_PREPEND_NAMESPACE(QV4::JIT); +using namespace QT_PREPEND_NAMESPACE(QV4::IR); +using namespace QT_PREPEND_NAMESPACE(QV4); namespace { class ResolutionPhase: protected StmtVisitor, protected ExprVisitor { const QVector<LifeTimeInterval> &_intervals; QVector<const LifeTimeInterval *> _unprocessed; - Function *_function; + IR::Function *_function; #if !defined(QT_NO_DEBUG) RegAllocInfo *_info; #endif - const QHash<V4IR::Temp, int> &_assignedSpillSlots; - QHash<V4IR::Temp, const LifeTimeInterval *> _intervalForTemp; + const QHash<IR::Temp, int> &_assignedSpillSlots; + QHash<IR::Temp, const LifeTimeInterval *> _intervalForTemp; const QVector<int> &_intRegs; const QVector<int> &_fpRegs; @@ -687,8 +687,8 @@ class ResolutionPhase: protected StmtVisitor, protected ExprVisitor { QHash<BasicBlock *, QList<const LifeTimeInterval *> > _liveAtEnd; public: - ResolutionPhase(const QVector<LifeTimeInterval> &intervals, Function *function, RegAllocInfo *info, - const QHash<V4IR::Temp, int> &assignedSpillSlots, + ResolutionPhase(const QVector<LifeTimeInterval> &intervals, IR::Function *function, RegAllocInfo *info, + const QHash<IR::Temp, int> &assignedSpillSlots, const QVector<int> &intRegs, const QVector<int> &fpRegs) : _intervals(intervals) , _function(function) @@ -1041,8 +1041,8 @@ protected: } virtual void visitConst(Const *) {} - virtual void visitString(String *) {} - virtual void visitRegExp(RegExp *) {} + virtual void visitString(IR::String *) {} + virtual void visitRegExp(IR::RegExp *) {} virtual void visitName(Name *) {} virtual void visitClosure(Closure *) {} virtual void visitConvert(Convert *e) { e->expr->accept(this); } @@ -1084,7 +1084,7 @@ RegisterAllocator::~RegisterAllocator() { } -void RegisterAllocator::run(Function *function, const Optimizer &opt) +void RegisterAllocator::run(IR::Function *function, const Optimizer &opt) { _activeSpillSlots.resize(function->tempCount); @@ -1141,7 +1141,7 @@ static inline LifeTimeInterval createFixedInterval(int reg, bool isFP, int range { Temp t; t.init(Temp::PhysicalRegister, reg, 0); - t.type = isFP ? V4IR::DoubleType : V4IR::SInt32Type; + t.type = isFP ? IR::DoubleType : IR::SInt32Type; LifeTimeInterval i; i.setTemp(t); i.setReg(reg); diff --git a/src/qml/jit/qv4regalloc_p.h b/src/qml/jit/qv4regalloc_p.h index c6dfa9f11a..030fb4bf50 100644 --- a/src/qml/jit/qv4regalloc_p.h +++ b/src/qml/jit/qv4regalloc_p.h @@ -49,14 +49,14 @@ QT_BEGIN_NAMESPACE -namespace QQmlJS { -namespace MASM { +namespace QV4 { +namespace JIT { class RegAllocInfo; class RegisterAllocator { - typedef V4IR::LifeTimeInterval LifeTimeInterval; + typedef IR::LifeTimeInterval LifeTimeInterval; QVector<int> _normalRegisters; QVector<int> _fpRegisters; @@ -66,8 +66,8 @@ class RegisterAllocator QVector<LifeTimeInterval> _unhandled, _active, _inactive, _handled; - QHash<V4IR::Temp, int> _lastAssignedRegister; - QHash<V4IR::Temp, int> _assignedSpillSlots; + QHash<IR::Temp, int> _lastAssignedRegister; + QHash<IR::Temp, int> _assignedSpillSlots; QVector<int> _activeSpillSlots; Q_DISABLE_COPY(RegisterAllocator) @@ -76,7 +76,7 @@ public: RegisterAllocator(const QVector<int> &normalRegisters, const QVector<int> &fpRegisters); ~RegisterAllocator(); - void run(V4IR::Function *function, const V4IR::Optimizer &opt); + void run(IR::Function *function, const IR::Optimizer &opt); private: void prepareRanges(); @@ -87,17 +87,17 @@ private: int lastUse) const; int nextIntersection(const LifeTimeInterval ¤t, const LifeTimeInterval &another, const int position) const; - int nextUse(const V4IR::Temp &t, int startPosition) const; + int nextUse(const IR::Temp &t, int startPosition) const; void split(LifeTimeInterval ¤t, int beforePosition, bool skipOptionalRegisterUses =false); void splitInactiveAtEndOfLifetimeHole(int reg, bool isFPReg, int position); - void assignSpillSlot(const V4IR::Temp &t, int startPos, int endPos); - void resolve(V4IR::Function *function, const V4IR::Optimizer &opt); + void assignSpillSlot(const IR::Temp &t, int startPos, int endPos); + void resolve(IR::Function *function, const IR::Optimizer &opt); void dump() const; }; -} // end of namespace MASM -} // end of namespace QQmlJS +} // end of namespace JIT +} // end of namespace QV4 QT_END_NAMESPACE diff --git a/src/qml/jit/qv4unop.cpp b/src/qml/jit/qv4unop.cpp index 02a6f63a00..514002adf5 100644 --- a/src/qml/jit/qv4unop.cpp +++ b/src/qml/jit/qv4unop.cpp @@ -46,31 +46,28 @@ using namespace QV4; using namespace JIT; -using namespace QQmlJS; -using namespace MASM; - #define stringIfyx(s) #s #define stringIfy(s) stringIfyx(s) #define setOp(operation) \ do { call = operation; name = stringIfy(operation); } while (0) -void Unop::generate(QQmlJS::V4IR::Temp *source, QQmlJS::V4IR::Temp *target) +void Unop::generate(IR::Temp *source, IR::Temp *target) { UnaryOpName call = 0; const char *name = 0; switch (op) { - case V4IR::OpNot: + case IR::OpNot: generateNot(source, target); return; - case V4IR::OpUMinus: + case IR::OpUMinus: generateUMinus(source, target); return; - case V4IR::OpUPlus: setOp(__qmljs_uplus); break; - case V4IR::OpCompl: + case IR::OpUPlus: setOp(__qmljs_uplus); break; + case IR::OpCompl: generateCompl(source, target); return; - case V4IR::OpIncrement: setOp(__qmljs_increment); break; - case V4IR::OpDecrement: setOp(__qmljs_decrement); break; + case IR::OpIncrement: setOp(__qmljs_increment); break; + case IR::OpDecrement: setOp(__qmljs_decrement); break; default: Q_UNREACHABLE(); } // switch @@ -80,16 +77,16 @@ void Unop::generate(QQmlJS::V4IR::Temp *source, QQmlJS::V4IR::Temp *target) } } -void Unop::generateUMinus(V4IR::Temp *source, V4IR::Temp *target) +void Unop::generateUMinus(IR::Temp *source, IR::Temp *target) { - if (source->type == V4IR::SInt32Type) { + if (source->type == IR::SInt32Type) { Assembler::RegisterID tReg = Assembler::ScratchRegister; - if (target->kind == V4IR::Temp::PhysicalRegister) + if (target->kind == IR::Temp::PhysicalRegister) tReg = (Assembler::RegisterID) target->index; Assembler::RegisterID sReg = as->toInt32Register(source, tReg); as->move(sReg, tReg); as->neg32(tReg); - if (target->kind != V4IR::Temp::PhysicalRegister) + if (target->kind != IR::Temp::PhysicalRegister) as->storeInt32(tReg, target); return; } @@ -97,27 +94,27 @@ void Unop::generateUMinus(V4IR::Temp *source, V4IR::Temp *target) as->generateFunctionCallImp(target, "__qmljs_uminus", __qmljs_uminus, Assembler::PointerToValue(source)); } -void Unop::generateNot(V4IR::Temp *source, V4IR::Temp *target) +void Unop::generateNot(IR::Temp *source, IR::Temp *target) { - if (source->type == V4IR::BoolType) { + if (source->type == IR::BoolType) { Assembler::RegisterID tReg = Assembler::ScratchRegister; - if (target->kind == V4IR::Temp::PhysicalRegister) + if (target->kind == IR::Temp::PhysicalRegister) tReg = (Assembler::RegisterID) target->index; as->xor32(Assembler::TrustedImm32(0x1), as->toInt32Register(source, tReg), tReg); - if (target->kind != V4IR::Temp::PhysicalRegister) + if (target->kind != IR::Temp::PhysicalRegister) as->storeBool(tReg, target); return; - } else if (source->type == V4IR::SInt32Type) { + } else if (source->type == IR::SInt32Type) { Assembler::RegisterID tReg = Assembler::ScratchRegister; - if (target->kind == V4IR::Temp::PhysicalRegister) + if (target->kind == IR::Temp::PhysicalRegister) tReg = (Assembler::RegisterID) target->index; as->compare32(Assembler::Equal, as->toInt32Register(source, Assembler::ScratchRegister), Assembler::TrustedImm32(0), tReg); - if (target->kind != V4IR::Temp::PhysicalRegister) + if (target->kind != IR::Temp::PhysicalRegister) as->storeBool(tReg, target); return; - } else if (source->type == V4IR::DoubleType) { + } else if (source->type == IR::DoubleType) { // ### } // ## generic implementation testing for int/bool @@ -125,14 +122,14 @@ void Unop::generateNot(V4IR::Temp *source, V4IR::Temp *target) as->generateFunctionCallImp(target, "__qmljs_not", __qmljs_not, Assembler::PointerToValue(source)); } -void Unop::generateCompl(V4IR::Temp *source, V4IR::Temp *target) +void Unop::generateCompl(IR::Temp *source, IR::Temp *target) { - if (source->type == V4IR::SInt32Type) { + if (source->type == IR::SInt32Type) { Assembler::RegisterID tReg = Assembler::ScratchRegister; - if (target->kind == V4IR::Temp::PhysicalRegister) + if (target->kind == IR::Temp::PhysicalRegister) tReg = (Assembler::RegisterID) target->index; as->xor32(Assembler::TrustedImm32(0xffffffff), as->toInt32Register(source, tReg), tReg); - if (target->kind != V4IR::Temp::PhysicalRegister) + if (target->kind != IR::Temp::PhysicalRegister) as->storeInt32(tReg, target); return; } diff --git a/src/qml/jit/qv4unop_p.h b/src/qml/jit/qv4unop_p.h index 0ce81c5828..a8c62182ad 100644 --- a/src/qml/jit/qv4unop_p.h +++ b/src/qml/jit/qv4unop_p.h @@ -48,29 +48,25 @@ QT_BEGIN_NAMESPACE #if ENABLE(ASSEMBLER) -namespace QQmlJS { -namespace MASM { -class Assembler; -} -} - namespace QV4 { namespace JIT { +class Assembler; + struct Unop { - Unop(QQmlJS::MASM::Assembler *assembler, QQmlJS::V4IR::AluOp operation) + Unop(Assembler *assembler, IR::AluOp operation) : as(assembler) , op(operation) {} - void generate(QQmlJS::V4IR::Temp *source, QQmlJS::V4IR::Temp *target); + void generate(IR::Temp *source, IR::Temp *target); - void generateUMinus(QQmlJS::V4IR::Temp *source, QQmlJS::V4IR::Temp *target); - void generateNot(QQmlJS::V4IR::Temp *source, QQmlJS::V4IR::Temp *target); - void generateCompl(QQmlJS::V4IR::Temp *source, QQmlJS::V4IR::Temp *target); + void generateUMinus(IR::Temp *source, IR::Temp *target); + void generateNot(IR::Temp *source, IR::Temp *target); + void generateCompl(IR::Temp *source, IR::Temp *target); - QQmlJS::MASM::Assembler *as; - QQmlJS::V4IR::AluOp op; + Assembler *as; + IR::AluOp op; }; } |