diff options
| author | Erik Verbruggen <erik.verbruggen@digia.com> | 2016-11-23 13:56:34 +0100 |
|---|---|---|
| committer | Simon Hausmann <simon.hausmann@qt.io> | 2016-11-23 13:00:59 +0000 |
| commit | c712f638a0a3ad2a71a9a18601fd320dabd50f16 (patch) | |
| tree | b3eedb48f9a733f276e7e752e3ab2ff21e1a783b /src | |
| parent | c4ebe96c34c2179d0ebdc555afdce179e3de52e8 (diff) | |
V4: Fix JIT codegen for null/undefined conditional jumps
When checking for undefined, both the tag and the value need to be
checked. When loading the tag, it shouldn't end up in the same register
that is used to hold the address of the QV4::Value.
Change-Id: I380fce432ba489fdabe569dd2c9cac31e9905260
Reviewed-by: Simon Hausmann <simon.hausmann@qt.io>
Diffstat (limited to 'src')
| -rw-r--r-- | src/qml/jit/qv4isel_masm.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/qml/jit/qv4isel_masm.cpp b/src/qml/jit/qv4isel_masm.cpp index 05afc1ee77..4a201200fa 100644 --- a/src/qml/jit/qv4isel_masm.cpp +++ b/src/qml/jit/qv4isel_masm.cpp @@ -1871,7 +1871,7 @@ bool InstructionSelection::visitCJumpStrictUndefined(IR::Binop *binop, Assembler::RelationalCondition cond = binop->op == IR::OpStrictEqual ? Assembler::Equal : Assembler::NotEqual; - const Assembler::RegisterID tagReg = Assembler::ScratchRegister; + const Assembler::RegisterID tagReg = Assembler::ReturnValueRegister; #ifdef QV4_USE_64_BIT_VALUE_ENCODING Assembler::Pointer addr = _as->loadAddress(Assembler::ScratchRegister, varSrc); _as->load64(addr, tagReg); @@ -1970,7 +1970,7 @@ bool InstructionSelection::visitCJumpNullUndefined(IR::Type nullOrUndef, IR::Bin Assembler::Pointer tagAddr = _as->loadAddress(Assembler::ScratchRegister, varSrc); tagAddr.offset += 4; - const Assembler::RegisterID tagReg = Assembler::ScratchRegister; + const Assembler::RegisterID tagReg = Assembler::ReturnValueRegister; _as->load32(tagAddr, tagReg); if (binop->op == IR::OpNotEqual) |