diff options
| author | Erik Verbruggen <erik.verbruggen@digia.com> | 2014-08-08 15:36:37 +0200 |
|---|---|---|
| committer | Erik Verbruggen <erik.verbruggen@digia.com> | 2014-08-14 15:28:04 +0200 |
| commit | 35d76da20ab2afd4db01ea231d9a90d5d598c24b (patch) | |
| tree | d111bb6d2999d6ea7d876266a5e872aed962e2ea /src | |
| parent | 8e47157252b41c537bb1e05c621d16654c2639fd (diff) | |
V4 JIT: add d8-d15 as available FP registers on ARM.
VFP3-d16 is the minimum implementation available on ARMv7, so these
registers are also always available. The big added bonus is that they
are callee saved, so using them will result in less loads/stores for
doubles.
Change-Id: I0cab3fe24d8677315b4c7d9449d8619cbf9a2919
Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/qml/jit/qv4targetplatform_p.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/qml/jit/qv4targetplatform_p.h b/src/qml/jit/qv4targetplatform_p.h index b32fe66ac3..7e2cc6b583 100644 --- a/src/qml/jit/qv4targetplatform_p.h +++ b/src/qml/jit/qv4targetplatform_p.h @@ -317,8 +317,15 @@ public: << RI(JSC::ARMRegisters::d4, QStringLiteral("d4"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) << RI(JSC::ARMRegisters::d5, QStringLiteral("d5"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) << RI(JSC::ARMRegisters::d6, QStringLiteral("d6"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARMRegisters::d8, QStringLiteral("d8"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARMRegisters::d9, QStringLiteral("d9"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARMRegisters::d10, QStringLiteral("d10"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARMRegisters::d11, QStringLiteral("d11"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARMRegisters::d12, QStringLiteral("d12"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARMRegisters::d13, QStringLiteral("d13"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARMRegisters::d14, QStringLiteral("d14"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARMRegisters::d15, QStringLiteral("d15"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) ; - // TODO: someone should check what's up with d8-d15: are they alway available, and are they caller or callee saved? } #undef HAVE_ALU_OPS_WITH_MEM_OPERAND |