diff options
Diffstat (limited to 'src/3rdparty/masm/assembler/MacroAssemblerARM64.h')
-rw-r--r-- | src/3rdparty/masm/assembler/MacroAssemblerARM64.h | 39 |
1 files changed, 9 insertions, 30 deletions
diff --git a/src/3rdparty/masm/assembler/MacroAssemblerARM64.h b/src/3rdparty/masm/assembler/MacroAssemblerARM64.h index e5a704292d..c0c68f6393 100644 --- a/src/3rdparty/masm/assembler/MacroAssemblerARM64.h +++ b/src/3rdparty/masm/assembler/MacroAssemblerARM64.h @@ -26,7 +26,7 @@ #ifndef MacroAssemblerARM64_h #define MacroAssemblerARM64_h -#if ENABLE(ASSEMBLER) && (CPU(ARM64) || defined(V4_BOOTSTRAP)) +#if ENABLE(ASSEMBLER) && CPU(ARM64) #include "ARM64Assembler.h" #include "AbstractMacroAssembler.h" @@ -211,33 +211,6 @@ public: static bool shouldBlindForSpecificArch(uint32_t value) { return value >= 0x00ffffff; } static bool shouldBlindForSpecificArch(uint64_t value) { return value >= 0x00ffffff; } -#if defined(V4_BOOTSTRAP) - void loadPtr(ImplicitAddress address, RegisterID dest) - { - load64(address, dest); - } - - void subPtr(TrustedImm32 imm, RegisterID dest) - { - sub64(imm, dest); - } - - void addPtr(TrustedImm32 imm, RegisterID dest) - { - add64(imm, dest); - } - - void addPtr(TrustedImm32 imm, RegisterID src, RegisterID dest) - { - add64(imm, src, dest); - } - - void storePtr(RegisterID src, ImplicitAddress address) - { - store64(src, address); - } -#endif - // Integer operations: void add32(RegisterID a, RegisterID b, RegisterID dest) @@ -1126,6 +1099,14 @@ public: m_assembler.ldrh(dest, address.base, memoryTempRegister); } + void load16(ExtendedAddress address, RegisterID dest) + { + moveToCachedReg(TrustedImmPtr(reinterpret_cast<void*>(address.offset)), m_cachedMemoryTempRegister); + m_assembler.ldrh(dest, memoryTempRegister, address.base, ARM64Assembler::UXTX, 1); + if (dest == memoryTempRegister) + m_cachedMemoryTempRegister.invalidate(); + } + void load16Unaligned(ImplicitAddress address, RegisterID dest) { load16(address, dest); @@ -2814,7 +2795,6 @@ public: return branch32(cond, left, dataTempRegister); } -#if !defined(V4_BOOTSTRAP) PatchableJump patchableBranchPtr(RelationalCondition cond, Address left, TrustedImmPtr right) { m_makeJumpPatchable = true; @@ -2822,7 +2802,6 @@ public: m_makeJumpPatchable = false; return PatchableJump(result); } -#endif PatchableJump patchableBranchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1)) { |