2 files changed, 7 insertions, 3 deletions
diff --git a/src/3rdparty/masm/disassembler/ARMv7/ARMv7DOpcode.cpp b/src/3rdparty/masm/disassembler/ARMv7/ARMv7DOpcode.cpp
index 81063e2b11..ae7b0859ed 100644
--- a/src/3rdparty/masm/disassembler/ARMv7/ARMv7DOpcode.cpp
+++ b/src/3rdparty/masm/disassembler/ARMv7/ARMv7DOpcode.cpp
@@ -49,7 +49,7 @@ const char* const ARMv7DOpcode::s_optionName[8] = {
 };
 
 const char* const ARMv7DOpcode::s_shiftNames[4] = {
-    "lsl", "lsr", "asl", "ror"
+    "lsl", "lsr", "asr", "ror"
 };
 
 const char* const ARMv7DOpcode::s_specialRegisterNames[3] = { "sp", "lr", "pc" };
@@ -944,7 +944,7 @@ const char* ARMv7DOpcodeDataProcessingShiftedReg::format()
             appendSeparator();
             appendRegisterName(rm());
             appendSeparator();
-            appendUnsignedImmediate(immediate5());
+            appendImmShift(type(), immediate5());
 
             return m_formatBuffer;
         }
diff --git a/src/3rdparty/masm/disassembler/ARMv7/ARMv7DOpcode.h b/src/3rdparty/masm/disassembler/ARMv7/ARMv7DOpcode.h
index ca5f955ba1..5bcb6b15b9 100644
--- a/src/3rdparty/masm/disassembler/ARMv7/ARMv7DOpcode.h
+++ b/src/3rdparty/masm/disassembler/ARMv7/ARMv7DOpcode.h
@@ -69,6 +69,7 @@ protected:
 
     static const char* conditionName(unsigned condition) { return s_conditionNames[condition & 0xf]; }
     static const char* shiftName(unsigned shiftValue) { return s_shiftNames[shiftValue & 0x3]; }
+    static bool isRightShift(unsigned shiftValue) { return shiftValue == 1 || shiftValue == 2; }
 
     bool inITBlock() { return m_ITConditionIndex < m_ITBlocksize; }
     bool startingITBlock() { return m_ITConditionIndex == m_ITBlocksize + 1; }
@@ -514,7 +515,10 @@ protected:
     const char* opName() { return shiftName(op()); }
 
     unsigned op() { return (m_opcode >> 12) & 0x3; }
-    unsigned immediate5() { return (m_opcode >> 6) & 0x1f; }
+    unsigned immediate5() {
+        unsigned imm = (m_opcode >> 6) & 0x1f;
+        return isRightShift(op()) && imm == 0 ? 32 : imm;
+    }
 };
 
 class ARMv7DOpcodeMiscAddSubSP : public ARMv7D16BitOpcode {