diff options
Diffstat (limited to 'src/qml/jit/qv4targetplatform_p.h')
| -rw-r--r-- | src/qml/jit/qv4targetplatform_p.h | 210 |
1 files changed, 175 insertions, 35 deletions
diff --git a/src/qml/jit/qv4targetplatform_p.h b/src/qml/jit/qv4targetplatform_p.h index 90ed1f972e..6f0a7374c3 100644 --- a/src/qml/jit/qv4targetplatform_p.h +++ b/src/qml/jit/qv4targetplatform_p.h @@ -1,31 +1,37 @@ /**************************************************************************** ** -** Copyright (C) 2015 The Qt Company Ltd. -** Contact: http://www.qt.io/licensing/ +** Copyright (C) 2016 The Qt Company Ltd. +** Contact: https://www.qt.io/licensing/ ** ** This file is part of the QtQml module of the Qt Toolkit. ** -** $QT_BEGIN_LICENSE:LGPL21$ +** $QT_BEGIN_LICENSE:LGPL$ ** Commercial License Usage ** Licensees holding valid commercial Qt licenses may use this file in ** accordance with the commercial license agreement provided with the ** Software or, alternatively, in accordance with the terms contained in ** a written agreement between you and The Qt Company. For licensing terms -** and conditions see http://www.qt.io/terms-conditions. For further -** information use the contact form at http://www.qt.io/contact-us. +** and conditions see https://www.qt.io/terms-conditions. For further +** information use the contact form at https://www.qt.io/contact-us. ** ** GNU Lesser General Public License Usage ** Alternatively, this file may be used under the terms of the GNU Lesser -** General Public License version 2.1 or version 3 as published by the Free -** Software Foundation and appearing in the file LICENSE.LGPLv21 and -** LICENSE.LGPLv3 included in the packaging of this file. Please review the -** following information to ensure the GNU Lesser General Public License -** requirements will be met: https://www.gnu.org/licenses/lgpl.html and -** http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html. +** General Public License version 3 as published by the Free Software +** Foundation and appearing in the file LICENSE.LGPL3 included in the +** packaging of this file. Please review the following information to +** ensure the GNU Lesser General Public License version 3 requirements +** will be met: https://www.gnu.org/licenses/lgpl-3.0.html. ** -** As a special exception, The Qt Company gives you certain additional -** rights. These rights are described in The Qt Company LGPL Exception -** version 1.1, included in the file LGPL_EXCEPTION.txt in this package. +** GNU General Public License Usage +** Alternatively, this file may be used under the terms of the GNU +** General Public License version 2.0 or (at your option) the GNU General +** Public license version 3 or any later version approved by the KDE Free +** Qt Foundation. The licenses are as published by the Free Software +** Foundation and appearing in the file LICENSE.GPL2 and LICENSE.GPL3 +** included in the packaging of this file. Please review the following +** information to ensure the GNU General Public License requirements will +** be met: https://www.gnu.org/licenses/gpl-2.0.html and +** https://www.gnu.org/licenses/gpl-3.0.html. ** ** $QT_END_LICENSE$ ** @@ -76,10 +82,10 @@ namespace JIT { class TargetPlatform { public: -#if CPU(X86) && (OS(LINUX) || OS(WINDOWS) || OS(QNX) || OS(FREEBSD)) +#if CPU(X86) && (OS(LINUX) || OS(WINDOWS) || OS(QNX) || OS(FREEBSD) || defined(Q_OS_IOS)) enum { RegAllocIsSupported = 1 }; - static const JSC::MacroAssembler::RegisterID StackFrameRegister = JSC::X86Registers::ebp; + static const JSC::MacroAssembler::RegisterID FramePointerRegister = JSC::X86Registers::ebp; static const JSC::MacroAssembler::RegisterID StackPointerRegister = JSC::X86Registers::esp; static const JSC::MacroAssembler::RegisterID LocalsRegister = JSC::X86Registers::edi; static const JSC::MacroAssembler::RegisterID EngineRegister = JSC::X86Registers::esi; @@ -116,8 +122,8 @@ public: static const int StackAlignment = 16; static const int StackShadowSpace = 0; static const int StackSpaceAllocatedUponFunctionEntry = RegisterSize; // Return address is pushed onto stack by the CPU. - static void platformEnterStandardStackFrame(JSC::MacroAssembler *as) { Q_UNUSED(as); } - static void platformLeaveStandardStackFrame(JSC::MacroAssembler *as) { Q_UNUSED(as); } + static void platformEnterStandardStackFrame(JSC::MacroAssembler *as) { as->push(FramePointerRegister); } + static void platformLeaveStandardStackFrame(JSC::MacroAssembler *as) { as->pop(FramePointerRegister); } #if OS(WINDOWS) || OS(QNX) || \ ((OS(LINUX) || OS(FREEBSD)) && (defined(__PIC__) || defined(__PIE__))) @@ -128,7 +134,8 @@ public: static int ebxIdx = -1; if (ebxIdx == -1) { int calleeSaves = 0; - foreach (const RegisterInfo &info, getRegisterInfo()) { + const auto infos = getRegisterInfo(); + for (const RegisterInfo &info : infos) { if (info.reg<JSC::X86Registers::RegisterID>() == JSC::X86Registers::ebx) { ebxIdx = calleeSaves; break; @@ -139,16 +146,16 @@ public: Q_ASSERT(ebxIdx >= 0); ebxIdx += 1; } - return JSC::MacroAssembler::Address(StackFrameRegister, ebxIdx * -int(sizeof(void*))); + return JSC::MacroAssembler::Address(FramePointerRegister, ebxIdx * -int(sizeof(void*))); } #endif #endif // Windows on x86 -#if CPU(X86_64) && (OS(LINUX) || OS(MAC_OS_X) || OS(FREEBSD) || OS(QNX)) +#if CPU(X86_64) && (OS(LINUX) || OS(MAC_OS_X) || OS(FREEBSD) || OS(QNX) || defined(Q_OS_IOS)) enum { RegAllocIsSupported = 1 }; - static const JSC::MacroAssembler::RegisterID StackFrameRegister = JSC::X86Registers::ebp; + static const JSC::MacroAssembler::RegisterID FramePointerRegister = JSC::X86Registers::ebp; static const JSC::MacroAssembler::RegisterID StackPointerRegister = JSC::X86Registers::esp; static const JSC::MacroAssembler::RegisterID LocalsRegister = JSC::X86Registers::r12; static const JSC::MacroAssembler::RegisterID EngineRegister = JSC::X86Registers::r14; @@ -203,8 +210,8 @@ public: static const int StackAlignment = 16; static const int StackShadowSpace = 0; static const int StackSpaceAllocatedUponFunctionEntry = RegisterSize; // Return address is pushed onto stack by the CPU. - static void platformEnterStandardStackFrame(JSC::MacroAssembler *as) { Q_UNUSED(as); } - static void platformLeaveStandardStackFrame(JSC::MacroAssembler *as) { Q_UNUSED(as); } + static void platformEnterStandardStackFrame(JSC::MacroAssembler *as) { as->push(FramePointerRegister); } + static void platformLeaveStandardStackFrame(JSC::MacroAssembler *as) { as->pop(FramePointerRegister); } #endif // Linux/MacOS on x86_64 #if CPU(X86_64) && OS(WINDOWS) @@ -213,7 +220,7 @@ public: // incoming function parameters to the shadow space is missing. enum { RegAllocIsSupported = 0 }; - static const JSC::MacroAssembler::RegisterID StackFrameRegister = JSC::X86Registers::ebp; + static const JSC::MacroAssembler::RegisterID FramePointerRegister = JSC::X86Registers::ebp; static const JSC::MacroAssembler::RegisterID StackPointerRegister = JSC::X86Registers::esp; static const JSC::MacroAssembler::RegisterID LocalsRegister = JSC::X86Registers::r12; static const JSC::MacroAssembler::RegisterID EngineRegister = JSC::X86Registers::r14; @@ -260,8 +267,8 @@ public: static const int StackAlignment = 16; static const int StackShadowSpace = 32; static const int StackSpaceAllocatedUponFunctionEntry = RegisterSize; // Return address is pushed onto stack by the CPU. - static void platformEnterStandardStackFrame(JSC::MacroAssembler *as) { Q_UNUSED(as); } - static void platformLeaveStandardStackFrame(JSC::MacroAssembler *as) { Q_UNUSED(as); } + static void platformEnterStandardStackFrame(JSC::MacroAssembler *as) { as->push(FramePointerRegister); } + static void platformLeaveStandardStackFrame(JSC::MacroAssembler *as) { as->pop(FramePointerRegister); } #endif // Windows on x86_64 #if CPU(ARM) @@ -280,10 +287,10 @@ public: // is used for the subroutine: r7 for Thumb or Thumb2, and r11 for ARM. We assign the constants // accordingly, and assign the locals-register to the "other" register. #if CPU(ARM_THUMB2) - static const JSC::MacroAssembler::RegisterID StackFrameRegister = JSC::ARMRegisters::r7; + static const JSC::MacroAssembler::RegisterID FramePointerRegister = JSC::ARMRegisters::r7; static const JSC::MacroAssembler::RegisterID LocalsRegister = JSC::ARMRegisters::r11; #else // Thumbs down - static const JSC::MacroAssembler::RegisterID StackFrameRegister = JSC::ARMRegisters::r11; + static const JSC::MacroAssembler::RegisterID FramePointerRegister = JSC::ARMRegisters::r11; static const JSC::MacroAssembler::RegisterID LocalsRegister = JSC::ARMRegisters::r7; #endif static const JSC::MacroAssembler::RegisterID StackPointerRegister = JSC::ARMRegisters::r13; @@ -353,14 +360,137 @@ public: static const int StackAlignment = 8; // Per AAPCS static const int StackShadowSpace = 0; static const int StackSpaceAllocatedUponFunctionEntry = 1 * RegisterSize; // Registers saved in platformEnterStandardStackFrame below. - static void platformEnterStandardStackFrame(JSC::MacroAssembler *as) { as->push(JSC::ARMRegisters::lr); } - static void platformLeaveStandardStackFrame(JSC::MacroAssembler *as) { as->pop(JSC::ARMRegisters::lr); } -#endif // Linux on ARM (32 bit) + + static void platformEnterStandardStackFrame(JSC::MacroAssembler *as) + { + as->push(JSC::ARMRegisters::lr); + as->push(FramePointerRegister); + } + + static void platformLeaveStandardStackFrame(JSC::MacroAssembler *as) + { + as->pop(FramePointerRegister); + as->pop(JSC::ARMRegisters::lr); + } +#endif // ARM (32 bit) + +#if CPU(ARM64) + enum { RegAllocIsSupported = 1 }; + + static const JSC::MacroAssembler::RegisterID FramePointerRegister = JSC::ARM64Registers::fp; + static const JSC::MacroAssembler::RegisterID LocalsRegister = JSC::ARM64Registers::x28; + static const JSC::MacroAssembler::RegisterID StackPointerRegister = JSC::ARM64Registers::sp; + static const JSC::MacroAssembler::RegisterID ScratchRegister = JSC::ARM64Registers::x9; + static const JSC::MacroAssembler::RegisterID EngineRegister = JSC::ARM64Registers::x27; + static const JSC::MacroAssembler::RegisterID ReturnValueRegister = JSC::ARM64Registers::x0; + static const JSC::MacroAssembler::FPRegisterID FPGpr0 = JSC::ARM64Registers::q0; + static const JSC::MacroAssembler::FPRegisterID FPGpr1 = JSC::ARM64Registers::q1; + + static RegisterInformation getPlatformRegisterInfo() + { + typedef RegisterInfo RI; + return RegisterInformation() + << RI(JSC::ARM64Registers::x0, QStringLiteral("x0"), RI::RegularRegister, RI::CallerSaved, RI::Predefined) + << RI(JSC::ARM64Registers::x1, QStringLiteral("x1"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x2, QStringLiteral("x2"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x3, QStringLiteral("x3"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x4, QStringLiteral("x4"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x5, QStringLiteral("x5"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x6, QStringLiteral("x6"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x7, QStringLiteral("x7"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x8, QStringLiteral("x8"), RI::RegularRegister, RI::CallerSaved, RI::Predefined) + << RI(JSC::ARM64Registers::x9, QStringLiteral("x9"), RI::RegularRegister, RI::CalleeSaved, RI::Predefined) + << RI(JSC::ARM64Registers::x10, QStringLiteral("x10"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x11, QStringLiteral("x11"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x12, QStringLiteral("x12"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x13, QStringLiteral("x13"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x14, QStringLiteral("x14"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x15, QStringLiteral("x15"), RI::RegularRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x19, QStringLiteral("x19"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x20, QStringLiteral("x20"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x21, QStringLiteral("x21"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x22, QStringLiteral("x22"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x23, QStringLiteral("x23"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x24, QStringLiteral("x24"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x25, QStringLiteral("x25"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x26, QStringLiteral("x26"), RI::RegularRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::x27, QStringLiteral("x27"), RI::RegularRegister, RI::CalleeSaved, RI::Predefined) + << RI(JSC::ARM64Registers::x28, QStringLiteral("x28"), RI::RegularRegister, RI::CalleeSaved, RI::Predefined) + + << RI(JSC::ARM64Registers::q2, QStringLiteral("q2"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q3, QStringLiteral("q3"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q4, QStringLiteral("q4"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q5, QStringLiteral("q5"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q6, QStringLiteral("q6"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q8, QStringLiteral("q8"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q9, QStringLiteral("q9"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q10, QStringLiteral("q10"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q11, QStringLiteral("q11"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q12, QStringLiteral("q12"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q13, QStringLiteral("q13"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q14, QStringLiteral("q14"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q15, QStringLiteral("q15"), RI::FloatingPointRegister, RI::CalleeSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q16, QStringLiteral("q16"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q17, QStringLiteral("q17"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q18, QStringLiteral("q18"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q19, QStringLiteral("q19"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q20, QStringLiteral("q20"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q21, QStringLiteral("q21"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q22, QStringLiteral("q22"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q23, QStringLiteral("q23"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q24, QStringLiteral("q24"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q25, QStringLiteral("q25"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q26, QStringLiteral("q26"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q27, QStringLiteral("q27"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q28, QStringLiteral("q28"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q29, QStringLiteral("q29"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q30, QStringLiteral("q30"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + << RI(JSC::ARM64Registers::q31, QStringLiteral("q31"), RI::FloatingPointRegister, RI::CallerSaved, RI::RegAlloc) + ; + } + +#undef HAVE_ALU_OPS_WITH_MEM_OPERAND +#define VALUE_FITS_IN_REGISTER + static const int RegisterSize = 8; + +#define ARGUMENTS_IN_REGISTERS + static const int RegisterArgumentCount = 8; + static JSC::MacroAssembler::RegisterID registerForArgument(int index) + { + static JSC::MacroAssembler::RegisterID regs[RegisterArgumentCount] = { + JSC::ARM64Registers::x0, + JSC::ARM64Registers::x1, + JSC::ARM64Registers::x2, + JSC::ARM64Registers::x3, + JSC::ARM64Registers::x4, + JSC::ARM64Registers::x5, + JSC::ARM64Registers::x6, + JSC::ARM64Registers::x7 + }; + + Q_ASSERT(index >= 0 && index < RegisterArgumentCount); + return regs[index]; + }; + + static const int StackAlignment = 16; + static const int StackShadowSpace = 0; + static const int StackSpaceAllocatedUponFunctionEntry = 1 * RegisterSize; // Registers saved in platformEnterStandardStackFrame below. + + static void platformEnterStandardStackFrame(JSC::MacroAssembler *as) + { + as->pushPair(FramePointerRegister, JSC::ARM64Registers::lr); + } + + static void platformLeaveStandardStackFrame(JSC::MacroAssembler *as) + { + as->popPair(FramePointerRegister, JSC::ARM64Registers::lr); + } +#endif // ARM64 #if defined(Q_PROCESSOR_MIPS_32) && defined(Q_OS_LINUX) enum { RegAllocIsSupported = 1 }; - static const JSC::MacroAssembler::RegisterID StackFrameRegister = JSC::MIPSRegisters::fp; + static const JSC::MacroAssembler::RegisterID FramePointerRegister = JSC::MIPSRegisters::fp; static const JSC::MacroAssembler::RegisterID StackPointerRegister = JSC::MIPSRegisters::sp; static const JSC::MacroAssembler::RegisterID LocalsRegister = JSC::MIPSRegisters::s0; static const JSC::MacroAssembler::RegisterID EngineRegister = JSC::MIPSRegisters::s1; @@ -418,8 +548,18 @@ public: static const int StackAlignment = 8; static const int StackShadowSpace = 4 * RegisterSize; // Stack space for 4 argument registers. static const int StackSpaceAllocatedUponFunctionEntry = 1 * RegisterSize; // Registers saved in platformEnterStandardStackFrame below. - static void platformEnterStandardStackFrame(JSC::MacroAssembler *as) { as->push(JSC::MIPSRegisters::ra); } - static void platformLeaveStandardStackFrame(JSC::MacroAssembler *as) { as->pop(JSC::MIPSRegisters::ra); } + + static void platformEnterStandardStackFrame(JSC::MacroAssembler *as) + { + as->push(JSC::MIPSRegisters::ra); + as->push(FramePointerRegister); + } + + static void platformLeaveStandardStackFrame(JSC::MacroAssembler *as) + { + as->pop(FramePointerRegister); + as->pop(JSC::MIPSRegisters::ra); + } #endif // Linux on MIPS (32 bit) public: // utility functions |