diff options
Diffstat (limited to 'src/qml')
| -rw-r--r-- | src/qml/compiler/qv4isel_masm.cpp | 13 | ||||
| -rw-r--r-- | src/qml/compiler/qv4regalloc.cpp | 2 | ||||
| -rw-r--r-- | src/qml/compiler/qv4ssa.cpp | 6 |
3 files changed, 13 insertions, 8 deletions
diff --git a/src/qml/compiler/qv4isel_masm.cpp b/src/qml/compiler/qv4isel_masm.cpp index 461186a719..14956190aa 100644 --- a/src/qml/compiler/qv4isel_masm.cpp +++ b/src/qml/compiler/qv4isel_masm.cpp @@ -1387,8 +1387,7 @@ void InstructionSelection::binop(V4IR::AluOp oper, V4IR::Expr *leftSource, V4IR: doubleBinop(oper, leftSource, rightSource, target); return; } - if (leftSource->type == V4IR::SInt32Type && - (rightSource->type == V4IR::SInt32Type || rightSource->type == V4IR::UInt32Type)) { + if (leftSource->type == V4IR::SInt32Type && rightSource->type == V4IR::SInt32Type) { if (int32Binop(oper, leftSource, rightSource, target)) return; } @@ -2479,6 +2478,16 @@ bool InstructionSelection::int32Binop(V4IR::AluOp oper, V4IR::Expr *leftSource, _as->rshift32(Assembler::ScratchRegister, Assembler::ReturnValueRegister); _as->storeInt32(Assembler::ReturnValueRegister, target); return true; + case V4IR::OpURShift: + Q_ASSERT(rightSource->type == V4IR::SInt32Type); + _as->move(_as->toInt32Register(leftSource, Assembler::ReturnValueRegister), + Assembler::ReturnValueRegister); + _as->move(_as->toInt32Register(rightSource, Assembler::ScratchRegister), + Assembler::ScratchRegister); + _as->and32(Assembler::TrustedImm32(0x1f), Assembler::ScratchRegister); // TODO: for constants, do this in the IR + _as->urshift32(Assembler::ScratchRegister, Assembler::ReturnValueRegister); + _as->storeUInt32(Assembler::ReturnValueRegister, target); + return true; default: return false; } diff --git a/src/qml/compiler/qv4regalloc.cpp b/src/qml/compiler/qv4regalloc.cpp index ec4027c69d..c35ee860f7 100644 --- a/src/qml/compiler/qv4regalloc.cpp +++ b/src/qml/compiler/qv4regalloc.cpp @@ -456,7 +456,7 @@ protected: // IRDecoder || (oper >= OpGt && oper <= OpStrictNotEqual)) { needsCall = false; } - } if (oper == OpBitAnd || oper == OpBitOr || oper == OpBitXor || oper == OpLShift || oper == OpRShift) { + } if (oper == OpBitAnd || oper == OpBitOr || oper == OpBitXor || oper == OpLShift || oper == OpRShift || oper == OpURShift) { needsCall = false; } diff --git a/src/qml/compiler/qv4ssa.cpp b/src/qml/compiler/qv4ssa.cpp index ee2607a086..c9ff6ad53c 100644 --- a/src/qml/compiler/qv4ssa.cpp +++ b/src/qml/compiler/qv4ssa.cpp @@ -1722,12 +1722,8 @@ protected: case OpLShift: case OpRShift: - run(e->left, SInt32Type); - run(e->right, SInt32Type); - break; - case OpURShift: - run(e->left, UInt32Type); + run(e->left, SInt32Type); run(e->right, SInt32Type); break; |