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* V4: fix range splitting when split is between intervals.Erik Verbruggen2014-01-171-8/+39
| | | | | | | | | | | Also added some "white-box" unit tests and sprinkled in a bit of documentation. The case that went wrong is covered by the test rangeSplitting_1: before the fix, the new interval would have two ranges: [66-64],[70-71]. The first range is invalid and should not be there at all. Change-Id: If0742f4e6a96d98ea5d696f95126886ba66f92bb Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 IR: do edge splitting after SSA transformationErik Verbruggen2014-01-161-8/+58
| | | | | | | | | | | | | | | This reduces the work for the dominator tree/frontier calculations, because there are less blocks to consider. All blocks inserted by splitting the critical edges, have (by definition) no effect on the dominator calculations. However, the immediate dominators for all new blocks needs to be added, because this information is used by the block scheduling. This change reduces memory/time usage during optimization passes, especially when processing excessively big switch statements. Change-Id: Ia69882e9dabdddffa1c98b1079012d8d988e1e8f Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4: lower memory allocator pressure.Erik Verbruggen2014-01-161-12/+18
| | | | | | | | | | | | | Changes to datastructures and more re-using of locally used temporary vectors. For the test regress-74474-002.js this lowers the total allocated memory from 1.98GB to 158MB. Thse peak memory usage stays at 75MB. There is no functional change. This should give a modest performance improvement which mainly depends on the speed of malloc()/free(). Change-Id: I1877c1903e59a33ee79ff2b801ef6f2c1cee30a6 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 IR: update immediate dominators when purging unreachable basic-blocksErik Verbruggen2014-01-161-13/+19
| | | | | | | | | The basic block scheduling uses this information to place loops. When the immediate dominator information is invalid, the scheduling can be sub-optimal, or will sometimes forget to schedule some blocks. Change-Id: Iaeb45f2b757b676310be25a658ceadc07d5722ec Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4: remove unnecessary spills and order them correctly.Erik Verbruggen2014-01-161-9/+13
| | | | | | | | | | | | | | | | | | | When doing edge resolving, too many spills were generated, and the dependency tracking of moves was not complete. Now we only insert spills that are caused by phi-nodes (because any other spill would be generated at the point a variable was defined). However, there can still be multiple dependencies between the moves generated by the edge resolving. Instead of only checking the first dependency, all of them are tracked. The bug report was a case where an unneccesary spill was generated, that got tracked, but "suppressed" the other (valid!) dependent move. The randomness was caused by the hash seeding of QHash. Task-number: QTBUG-35840 Change-Id: Ifbc3c8fc13de53c46a8b5859721b2497189921a3 Reviewed-by: Fawzi Mohamed <fawzi.mohamed@digia.com> Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4: optimize dominator frontier storage.Erik Verbruggen2014-01-081-7/+164
| | | | | | | | | | | | | | | | | | Changes the dominator frontier storage from a set of basic-blocks for every basic-block to a BasicBlockSet for every basic-block. This new class stores a maximum of 8 nodes in a vector, and switches to a bit vector when going beyond 8 nodes. This is important in two cases: most basic-blocks have 2-3 nodes in the frontier, and an array is faster than a set in these cases. The few cases where the frontier goes beyond 8 nodes, is when a switch statement is used with lots of cases that all fall-through. On regress-74474-003.js this reduces peak memory usage from 1.68G to 60M. The switch statement in this test results in 27000 basic-blocks. Change-Id: I42646522ba9f8642d42a5d70fc6b760bb47ae69f Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4: remove class field in DominatorTree that was used only once.Erik Verbruggen2014-01-021-21/+18
| | | | | | | | | Calculation of all the children of nodes in the dominator tree is now calculated as a local variable right before computing the dominator frontier. The effect is that they are not retained after their only use. Change-Id: I83c962c691b78cb767708eb04cf30d3b7a760deb Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4 IR: do not add unconditional jumps to work listsErik Verbruggen2014-01-021-1/+4
| | | | | | | | | | Both type inference and the optimization pass do not do anything with unconditional jumps. So, instead of adding them to the worklist and later on removing them again, it’s faster to never add them in the first place. Change-Id: Ib81d43e9ea6df2b1a70e9dd1e9b9c29cb6d345d2 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4 IR: change datastructures for dominator calculations.Erik Verbruggen2014-01-021-112/+172
| | | | | | | | Replace hashes from basic-block to basic-block with vectors that associate basic-block index to basic-block index. Change-Id: I834ea3d825e4d2b02c075b1b0f080f5a65f41317 Reviewed-by: Fawzi Mohamed <fawzi.mohamed@digia.com>
* V4 SSA: add some more literature references.Erik Verbruggen2013-12-191-5/+13
| | | | | | | Also fixed some comments. Change-Id: I4aedff84bdbf8de248025bc48805a859704bdd8a Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4 IR: change block scheduling algorithm from recursive to iterative.Erik Verbruggen2013-12-121-102/+189
| | | | | | | | This makes time- and memory-complexity a lot better when compiling big JavaScript functions. Change-Id: I2a7cb9b5979844254747fa5cf7355cca0b113904 Reviewed-by: Fawzi Mohamed <fawzi.mohamed@digia.com>
* V4: change variable renumbering algorithm from recursive to iterative.Erik Verbruggen2013-12-101-89/+237
| | | | | | | | | Replace the recursive calls and subsequent clean-ups by pushing actions on a to-do stack, and processing that stack in a loop. Change-Id: I83536e88d400592b6e9f5fda3d795e41711a131a Reviewed-by: Simon Hausmann <simon.hausmann@digia.com> Reviewed-by: Fawzi Mohamed <fawzi.mohamed@digia.com>
* Clean up property dependency data structuresSimon Hausmann2013-12-051-3/+4
| | | | | | | | | | | | | | | | As a follow-up to the previous commit, this patch cleans up the data structures used to track dependencies of QML binding expressions and functions to context and scope properties, determined at compile time. Instead of "collecting" these depending properties upfront (codegen time), we propagate the information that a property is a context or scope property into the IR at codegen time and later in the isel collect these properties and their notify signal index in a hash in the IR functions. The CompileData structure generator then can read these hashes directly when writing out the dependency information. Change-Id: I32134706e2d24bf63d1b1abad0259ab072460173 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4 IR: reverse propagate int32 truncation.Erik Verbruggen2013-12-041-112/+271
| | | | | Change-Id: I5cb0c7798d0e530f3137710bf0e723bd7b64dc89 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 IR: remove common toInt32 casts.Erik Verbruggen2013-12-031-2/+29
| | | | | | | | | | | | | E.g.: a | 0 b & 0xffffffff These operations force the operands to be converted to int32 without changing their value. At this point we already added convert calls to the IR, so we can safely get rid of these operations. Change-Id: Ic4d3b989e13439eccd2c878fa7bf5030acae7630 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4 IR: change the worklist to a QSet for block scheduling.Erik Verbruggen2013-12-031-4/+4
| | | | | | | Fixes a crash in octane. Change-Id: Ib72ac0b7a2941230a87543f30fcf7e55d7094886 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Slightly accelerate access to value type propertiesSimon Hausmann2013-11-281-5/+1
| | | | | | | | | | | We can't do a fast property index based access on them, due to the inability to read individual fields from the original object (i.e. the logic in QQmlValueTypeWrapper). However what we can determine and propagate is the type information of the individual properties, i.e. that the x and y properties of a QPointF are always doubles. Change-Id: Iee71ece2117294b7bc0b93deb0a77d7c51148b11 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Add support for accelerated property access to QML types and namespace supportSimon Hausmann2013-11-281-4/+14
| | | | | | | | | | | * Resolve lookups in namespaces at compile time and instruct the SSA optimizer to eliminate reads from the namespace (QQmlTypeWrapper) if possible. For example access to attached properties of types (i.e. MyNameSpace.ListView.isCurrentItem) requires neither reading the namespace nor the type. * Add support for accelerated lookup of attached properties Change-Id: Ib0b66404ed7e70e1d4a46a1ac8218743a4cc8608 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Initial support for accelerated property access to QML singletons and enumsSimon Hausmann2013-11-251-0/+13
| | | | | | | | | With this patch we determine the meta-object of singletons, propagate it into the IR and load them separately using a dedicated run-time function. In addition enums in singletons and QML types are resolved at compile time. Change-Id: I01ce1288391b476d1c9af669cb2987a44c885703 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Cleanup, get rid of MemberOfQObject V4IR::Member specializationSimon Hausmann2013-11-251-1/+1
| | | | | | | It is technically redundant to the Member::property field. Change-Id: If0ee35b2c94a2c9373784d36a1f8dfe8ad7dcfb3 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Improve type interference for QObject propertiesSimon Hausmann2013-11-251-46/+64
| | | | | | | | | | | | | | | | | | | | | | | | Propagate QObject properties in member expressions across temporaries as part of the type interference SSA pass. This replaces the earlier attempt to resolving QObject properties in fieldMemberExpression() in the codegen, but it was incomplete and now things like the following are fully resolved: var tmp = blah.somePropertyThatReturnsAQQuickItem; <-- QQuickItem property return type propagated into tmp var width = tmp.width; <-- and picked up here again to resolve the index of width instead of by name With this patch Temp gets a helper structure with a function pointer, initialized to aid the resolution of properties in Qt meta objects. This structure is propagated into the temps until it reaches the next member expression that uses the temp. Similarly QObjectType is added as IR type, next to VarType. The resolution inside the SSA type interference pass also requires passing through the QQmlEngine from the upper caller levels, in order to resolve the property type to a potential QMetaObject property. Change-Id: I14c98fa455db57603da46613ce49c174d0944291 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4: remove failing assert and fix code.Erik Verbruggen2013-11-191-3/+3
| | | | | | | | | | Assert failed for cases where the node’s ancestor with lowest semi-dominator number was not the same as the parent. The test case exemplifies this. Task-number: QTBUG-34792 Change-Id: Ie6847b22a27211801bff7479bfcbfaf329c6005a Reviewed-by: Fawzi Mohamed <fawzi.mohamed@digia.com>
* V4 SSA: speed up dominator calculations.Erik Verbruggen2013-11-181-63/+137
| | | | | | | | | | | Changed three recursive routines to worklist-based iterative ones. This not only speeds up the dominator frontier calculation, but also prevents the algorithm to run out of stack space. This is a partial fix for QTBUG-34047. Change-Id: Ife8dc35724d50408ad356e1621884bdb82db9626 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4 IR: change basic-block cleanup to remove unreachable cycles too.Erik Verbruggen2013-11-121-22/+57
| | | | | | | | | | | | | | | | | | | | The previous version left unreachable cycles untouched. For example in: function f() { if (false) while (true) { doSomething(); } anotherThing(); } The edge to the then-part would be removed, but the loop itself would not be removed. This resulted in the basic-block scheduler choking when hitting the block with the anotherThing() call, because it wants to have all blocks from incoming edges resolved first. Task-number: QTBUG-34776 Change-Id: I5b3a79140e6058c4ade4ec7687c1a795f1a74f97 Reviewed-by: Fawzi Mohamed <fawzi.mohamed@digia.com> Reviewed-by: Mitch Curtis <mitch.curtis@digia.com>
* Fix rounding behavior of Qml when assigning doubles to integer propertiesSimon Hausmann2013-11-051-8/+6
| | | | | | | | | | | | The engine used to round, but that is inconsistent with ECMAScript's way of converting doubles to integers by truncation. With this patch we can also enable the propagation of integer type information into the IR, but we have to be careful not to utilize it when writing properties. Change-Id: I04af4879ba5131349eca2eeff2b27f4598f5267b Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Fix various compiler warnings in order to remove warn_off in the near futureErik Verbruggen2013-11-041-17/+5
| | | | | Change-Id: Ic0492fbe31a1e134674bc6c20381f735dd6d5b7a Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Propagate bool/int/double/string types from QML into the IRSimon Hausmann2013-10-311-3/+34
| | | | | | | | | | | | | | | ... by mapping the property type to the IR type if possible. In an expression like parent.width * 0.5 this avoids a to-double conversion for parent.width but instead we can rely on the result of the property read for the width property to always be a double. Unfortunately integer propertyes are currently not propagated, because upon assignment from a double we would do the ECMAScript compliant truncation while QML actually expects a round to happen. This needs to be solved separately. Change-Id: I9c8f58416201d406e6e11d157cae12a686b774e5 Reviewed-by: Erik Verbruggen <erik.verbruggen@digia.com> Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Rework exception handlingLars Knoll2013-10-291-11/+12
| | | | | | | | | | | | | | Start the work to remove c++ exceptions from our JS exception handling. Rather rely on engine->hasException. Check the flag after we return from any runtime call in the JIT. Implement new try/catch handling code in qv4codegen and for the JIT that doesn't rely on exceptions. As an added bonus, we can remove the Try statement in the IR. Change-Id: Ic95addd6ae03371c43c47e04cac26afdce23a061 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 debugger: retrieve formals and locals.Erik Verbruggen2013-10-241-1/+1
| | | | | Change-Id: I47507a4d7d1b429b9c43ed3a7822079efe577327 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Implement >>> inline for the JIT backendLars Knoll2013-10-121-5/+1
| | | | | | | | | The unsigned right shift operations can use a signed int as input, unifying the handling with the other shift operations. The only difference now is in the type of the return value. Change-Id: Ia9b83568951d1c1c77322d07cd734e2c37d34573 Reviewed-by: Erik Verbruggen <erik.verbruggen@digia.com>
* Small optimisation for bit shift operationsLars Knoll2013-10-111-2/+2
| | | | | | | | | We don't need the right side of the shift operation as uint. Converting it to int is cheaper and more then enough, as all but the lowest 5 bits are ignored anyway. Change-Id: I8833e6cc4e565b8bd1e35a22250e03a9b34938df Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4: Remove more jumps.Erik Verbruggen2013-10-101-0/+39
| | | | | | | | | | | | | | | | | | | | | Do not generate jump instructions when the target immediately follows the current basic block, even if there are intermediate jumps in between as long as they jump to the same basic block. In the IR snippet below, no jumps will be generated at all. … L8: goto L6; L12: goto L6; L6: goto L4; L11: goto L4; L4: goto L2; L10: goto L2; L2: …. Before this change, the gotos in L8, L6, and L2 were still generated. Change-Id: I718ed0d41c603a6905f2279b782cd9e9cafb7d55 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Use a QVector instead of a QListLars Knoll2013-10-031-3/+3
| | | | | | | | This makes the code go quite a bit faster (saves ~7-8% of the total amount of instructions executed when running crypto.js Change-Id: I6b3bd08eca98b45593262e2fc6e0ce5056257e76 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 IR: fix dead-code elimination.Erik Verbruggen2013-10-031-93/+109
| | | | | Change-Id: If00a108fb107d331478dd36ad7feae4c4521c2ae Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Remove more uses of ValueLars Knoll2013-10-021-4/+4
| | | | | Change-Id: I889e760f75b485a28e1f2a2c26b2337ae9bfafac Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 IR: fix type inference.Erik Verbruggen2013-10-021-0/+8
| | | | | | | | | | | | | | | | | | When a phi-node couldn't be fully typed (e.g., when one of the temps was not yet typed), VarType was assumed. When a circular dependency between two phi-nodes occurred, like with a condition inside a loop, then depending on the ordering of the work-list, the two phi-nodes could start oscillating between VarType and the correct type. The fix is to check if one of the temps is not fully typed, and if so, assume whatever we currently have as the result and have the statement re-scheduled. Full typing will occur when the temp with the missing type information is typed. Change-Id: I950d81fe7fa8272cb37f7eea5b88092d1eb4817e Reviewed-by: Tor Arne Vestbø <tor.arne.vestbo@digia.com> Reviewed-by: Simon Hausmann <simon.hausmann@digia.com> Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4 IR: do type inference/propagation before optimization.Erik Verbruggen2013-09-301-40/+90
| | | | | | | | | | | | | This gives slightly better results for inplace increment/decrement, where the operand has to be converted to a number. When that operand is known to be a number, this conversion can be removed. By doing the optimizations after typing, these conversions will not only turn into assignments, but they will be propagated through the IR. That saves a copy/move, which, in turn, will lighten the work for the register allocator and the instruction selection. Change-Id: If76575a71fbcb2d810b94060e61b4364bdaaa065 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4: remove inplace operationsErik Verbruggen2013-09-301-3/+2
| | | | | | | | | Inplace operations are expanded when building the IR, so the neither the IR, nor the instruction selection backends or runtime need to handle them. Change-Id: Id01f9544e137dd52364cf2ed2c10931c31ddfff3 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4: changed environment variable SHOW_CODE.Erik Verbruggen2013-09-301-1/+1
| | | | | | | | | Use QV4_SHOW_ASM for the generated assembly from the JIT, and use QV4_SHOW_IR to get dumps of the IR. Change-Id: Id85d3d6c87b47088c312475a7c737d54c58c7791 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com> Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Move Value::toInteger(double) and related to PrimitiveLars Knoll2013-09-281-5/+5
| | | | | | | Also clean up a few other direct uses of Value Change-Id: Ie27d42c1b31b9e6d16d0a60071cb5e4e1c5b9e8b Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 SSA: cleanup: rename single letter variables.Erik Verbruggen2013-09-251-40/+40
| | | | | | | Because "targetTemp" and "sourceTemp" is clearer than, say, t1 and t2. Change-Id: I5195c75f1958a3bea3c370924685ff6ba9c9c515 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4: fix move mappingErik Verbruggen2013-09-251-5/+5
| | | | | | | | | | | | When resolving conflicting register use between basic blocks, only insert the resolving moves into the successor when it has one incoming edge. Because of the absence of critical edges, this implies that it is also save to insert those moves into the predecessor block if there is more than one incoming edge (the predecessor will only have one outgoing edge). Change-Id: I83c41b4ca86946d3aa09619f20ddab3e692136f2 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4: re-enable SSA transformation and optimization.Erik Verbruggen2013-09-251-1/+1
| | | | | | | But keep the register allocator disabled for now. Change-Id: I475835ec35ef31d76e084788a754c00b1f8fdda6 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4 IR: rename ObjectType to VarTypeErik Verbruggen2013-09-201-19/+23
| | | | | | | | | The ObjectType was a misnomer: it was used to indicate that the expression could have multiple types, or that the type could not be inferred statically. Change-Id: Ic48a0cd1dd7ae7bfafd361e0c9792ab161417039 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4: Fix SSA decomposition when no regalloc is used.Erik Verbruggen2013-09-131-73/+203
| | | | | | | | | Add scheduling for moves generated by removing phi nodes by re-using the MoveMapping class from the register allocator. This change applies to both the JIT when no register allocator is used, and the interpreter. Change-Id: I38eac5b13759c7790132d1ef07fa17fcb53187e3 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Remove qSort usages from declarativeGiuseppe D'Angelo2013-09-131-2/+3
| | | | | | | | | QtAlgorithms is getting deprecated, see http://www.mail-archive.com/development@qt-project.org/msg01603.html Change-Id: I8fa7d0186cc8f0ba562695974829e37f1eb87f2f Reviewed-by: Gunnar Sletta <gunnar.sletta@digia.com> Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4: fix variable collection for assignment to non-temporaries.Erik Verbruggen2013-09-121-14/+16
| | | | | Change-Id: Ie1de760824d8927cf10cbc1e02145f40d812e8ee Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 IR: fix Temp equality, and its use in type inference.Erik Verbruggen2013-09-121-14/+77
| | | | | Change-Id: Ibf14d8835517981eda41ee768446da49965248be Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Continue conversion to using scoped valuesLars Knoll2013-09-111-8/+10
| | | | | | | | | | | This converts all methods in qv4runtime_p.h to not use raw values in arguments anymore. The conversion of return values will be done in a separate commit. Change-Id: Ie6e8f3bed459d09cb831f7f87920b7eada161502 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4: Constant binary expression evaluation.Erik Verbruggen2013-09-101-6/+125
| | | | | | | | | Statically calculate binary expressions which have two constants as operands. Currently only for add/subtract/multiply/divide and comparisons. Change-Id: Ia8c7222d45bbba956025fe349fc1494015a3e74f Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
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