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* Remove prohibited uses of underscore + capital letterThiago Macieira2016-01-081-1/+1
| | | | | | | | | | | | | | All identifiers starting with an underscore and a capital letter are reserved to the compiler and must never be used by the user code. Try to find a better name or, in the worst case, move the underscore to the last position in these identifiers. See commit cf63c63d558227fdbef09699c261560e7474f5ea in qtbase for a case of such an identifier causing a build breakage when the compiler began treating it specially (it was _Nullable). Change-Id: I1d0f78915b5942aab07cffff140f9f39c29f0fdf Reviewed-by: Erik Verbruggen <erik.verbruggen@theqtcompany.com>
* Remove uses of QT_POINTER_SIZE, replacing with proper constructsThiago Macieira2015-10-291-1/+1
| | | | | | | | | | | Where the size of void* was really wanted, use sizeof(void*). There's only one use of QT_POINTER_SIZE in qtdeclarative now, in fdegen/ main.cpp selecting the ELF size constants. It's easier to keep it like that than to use C++ selecting constructs. The tool isn't built anyway. Change-Id: I1d0f78915b5942aab07cffff140fa0f99ce7d7d4 Reviewed-by: Erik Verbruggen <erik.verbruggen@theqtcompany.com>
* Use the correct macro to detect 64-bit value encodingThiago Macieira2015-10-291-3/+3
| | | | | | | We have a macro for it, so let's use it. Change-Id: I1d0f78915b5942aab07cffff140fa0ac23392362 Reviewed-by: Erik Verbruggen <erik.verbruggen@theqtcompany.com>
* Add missing "We mean it" comments to private headers.Friedemann Kleint2015-10-061-0/+11
| | | | | | Task-number: QTBUG-48594 Change-Id: Ifc207938de7f0c8995fc712df92665f222612647 Reviewed-by: Alan Alpert <aalpert@blackberry.com>
* Remove type punning from QV4::Value.Erik Verbruggen2015-07-241-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The union in QV4::Value is used to do type punning. In C++, this is compiler-defined behavior. For example, Clang and GCC will try to detect it and try to do the proper thing. However, it can play havoc with Alias Analysis, and it is not guaranteed that some Undefined Behavior (or Compiler depenedent behavior) might occur. The really problematic part is the struct inside the union: depending on the calling convention and the register size, it results in some exciting code. For example, the AMD64 ABI specifies that a struct of two values of INTEGER class can be passed in separate registers when doing a function call. Now, if the AA in the compiler looses track of the fact that the tag overlaps with the double, you might get: ecx := someTag ... conditional jumps double_case: rdx := xorredDoubleValue callq someWhere If the someWhere function checks for the tag first, mayhem ensues: the double value in rdx does not overwrite the tag that is passed in ecx. Changing the code to do reinterpret_cast<>s might also give problems on 32bit architectures, because there is a double, whose size is not the same as the size of the tag, which could confuse AA. So, to fix this, the following is changed: - only have a quint64 field in the QV4::Value, which has the added benefit that it's very clear for the compiler that it's a POD - as memcpy is the only approved way to ensure bit-by-bit "conversion" between types (esp. FP<->non-FP types), change all conversions to use memcpy. Use bitops (shift/and/or) for anything else. - only use accessor functions for non-quint64 values As any modern compiler has memcpy as an intrinsic, the call will be replaced with one or a few move instructions. The accessor functions also get inlined, the bitops get optimized, so in all cases the compiler can generate the most compact code possible. This patch obsoletes f558bc48585c69de36151248c969a484a969ebb4 (which had the exact aliassing problem of the double and the tag as described above). Change-Id: I60a39d8564be5ce6106403a56a8de90943217006 Reviewed-by: Ulf Hermann <ulf.hermann@theqtcompany.com>
* V4: add JIT support for mips platforms (32-bit) and enable itJulien Brianceau2015-04-271-0/+12
| | | | | | | [ChangeLog][QtQml] Enabled Just-In-Time compilation for JavaScript on MIPS Change-Id: Idce070f29645760d6376767ef67e4592828c104d Reviewed-by: Simon Hausmann <simon.hausmann@theqtcompany.com>
* V4 JIT: cosmetic changeJulien Brianceau2015-04-141-4/+4
| | | | | | | | Since 4377d44fb7399751ed4f284bb4be7ece494aff6d, we can avoid one generateFunctionCallImp bounce. Change-Id: I2e92578dbc26a614f7626d2c28a2d9b28dd06b6b Reviewed-by: Simon Hausmann <simon.hausmann@theqtcompany.com>
* Update copyright headersJani Heikkinen2015-02-121-7/+7
| | | | | | | | | Qt copyrights are now in The Qt Company, so we could update the source code headers accordingly. In the same go we should also fix the links to point to qt.io. Change-Id: I61120571787870c0ed17066afb31779b1e6e30e9 Reviewed-by: Iikka Eklund <iikka.eklund@theqtcompany.com>
* Fix run-time string handling with regards to the new heapSimon Hausmann2014-11-211-4/+4
| | | | | | | | | | | | | | | | | Changed runtimeStrings to be an array of Heap::String pointers instead of indirect String pointers. Later that member along with other GC related members will go into a managed subclass. Meanwhile the generated code no more loads String pointers directly but just passes the index into the run-time strings to the run-time functions, which in turn will load the heap string into a scoped string. Also replaced the template<T> Value::operator=(T *m) with a non-template overload that takes a Managed *, in order to help the compiler choose the non-template operator=(Heap::Base *) overload. This allows removing a bunch of Value::fromHeapObject calls. Change-Id: I20415c0549d33cca6813441a2495976b66d4c00e Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Change signature or runtime methods to take an engine pointerLars Knoll2014-11-121-10/+11
| | | | | | | | | This makes a lot more sense in the long term and is the more maintainable solution, once the GC starts moving objects around in memory Change-Id: I8f327c0f5b5b0af38c5fe1a217852ee8c4a5c2fc Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Refactor ExecutionContextsLars Knoll2014-11-081-3/+3
| | | | | | | Move the Data class out into the Heap namespace. Change-Id: I2b798deb53812a08155c92a0e6ef2dcd2ea137b8 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 JIT: fix stack layout.Erik Verbruggen2014-08-261-13/+15
| | | | | | | | | | | | | | | | | Commit d9f33ccdef985badc56fd8940373748626beffc7 introduced an off-by-one in the calculation of the offset of a saved register (in StackLayout::savedRegPointer), resulting in overwriting a callee saved register with the tag of a QV4::Value. This method now calculates those pointers relative to the bottom of the stack frame. The off-by-one didn't happen before that patch, because there was a magical +1 used in the constructor for the number of callee saved registers, thereby prevented this from happening. However, that resulted in a frame size that was unnecessary big. Task-number: QTBUG-40927 Change-Id: If88fe9f3490a4d23a1e69c630c87219fcfef671f Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Update license headers and add new licensesJani Heikkinen2014-08-251-18/+10
| | | | | | | | | - Renamed LICENSE.LGPL to LICENSE.LGPLv21 - Added LICENSE.LGPLv3 & LICENSE.GPLv2 - Removed LICENSE.GPL Change-Id: I84a565e2e0caa3b76bf291a7d188a57a4b00e1b0 Reviewed-by: Jani Heikkinen <jani.heikkinen@digia.com>
* V4 JIT: support saving used callee saved FP registers.Erik Verbruggen2014-08-141-6/+11
| | | | | | | | This is not used yet by any platform/abi we support, because we do not define any callee-saved FP registers. Yet. Change-Id: I5857a452456175398c5e9681ff33800b9431b9da Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 JIT: parameterize the prologue and epilogue generationErik Verbruggen2014-08-141-15/+17
| | | | | | | | | ... with the regular (non-FP) registers that need to be saved. This patch shouldn't change any of the JIT generated code, because all regular callee saved registers are passed in. Change-Id: Id11b8f37f06d80e8015ac6f0d0ccefdfa3342cbe Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Merge remote-tracking branch 'origin/5.3' into 5.4Frederik Gladhorn2014-08-141-3/+2
|\ | | | | | | Change-Id: I2e06c2fcd8aa9d5d090f0568be75272ec82f7b20
| * V4 JIT: fix JS stack frame size calculation.Erik Verbruggen2014-08-131-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | StackLayout::calculateJSStackFrameSize now returns the size in number of QV4::Value items, instead of bytes. The value is then multiplied in the assembler by sizeof(Value) to get the number of bytes. Previously, the return value was number of bytes, which also got multiplied. A direct effect is that the JS stack size will be ~87% smaller, with the nice effect that the GC will run faster (less roots on the stack). It also won't retain objects whose reference accidentally ended up on the stack below the used portion for the current function, so possibly freeing (more) objects (earlier) than before. Change-Id: Idd5a9c173e641c03e6b8a6fe743e403eda34dfe0 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 JIT: fix stack use below stack pointerErik Verbruggen2014-08-141-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | When storing a double value returned from a function call on platforms where the value wouldn't fit in a register, we used to store it on the stack and then load it into a FP register. This stack use was done without first lowering the stack pointer. For x86 and ARM, the value is loaded directly into the FP register, and for other non-64-bit platforms it correctly allocates the stack slot. Change-Id: Idbc260038958a036ac2a7383d845199626decc8e Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 JIT: generate code for int32 comparisons.Erik Verbruggen2014-08-121-0/+1
| | | | | | | | | | Change-Id: I5e88fb3df7b01f4f515ce4d2e451a5a6f5ba92ad Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 JIT: fix LookupCall on ARMErik Verbruggen2014-08-121-4/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To generate a LookupCall, the register r8 was used on ARM instead of the ReturnValue register. The reason is that the ReturnValue register is also the register for the first argument. However, now that we use callee-saved registers (r8 among them), this would clobber any value stored in r8. The fix is to actually use r0 to calculate the value, because the first argument holds the lookup table, and the call is relative to that. This leaves r8 free to be used by the register allocator. Change-Id: I5095bf69d27e16111ad32d9e5d5691c7bce14516 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 JIT: tune generated instructions for inplace binopsErik Verbruggen2014-08-121-2/+2
| | | | | | | | | | | | | | | | | | | | Generate better code for in-place binary operations where the right-hand side is either a constant or a memory address. Now that the JIT can do this, also tell the register allocator not to un-spill that right-hand side. Change-Id: I0ab852f6b92f90dfed99c05fbaf91aad2549ecf4 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | Convert ExecutionContext to new storage schemeLars Knoll2014-07-221-2/+2
| | | | | | | | | | Change-Id: I9fcc13da5360f37cef3149b114ed9263b9b74281 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4: clean-up target specific register definitions and stack usageErik Verbruggen2014-05-241-154/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All constants referring to registers and all constants and functions that do platform specific things with the stack, are all modev into a separate file. Information about how a specific platform register is used by the ABI is also extended and is now captured in the RegisterInfo class. Usage of this information will be extended in subsequent patches. This also fix ARM register usage: - Correct fp register for Thumb mode. - Only push registers that have to be saved and will actually be used from the stack (i.e. do not push r0-r3 in the function prelude). Change-Id: Ia372505ade8f2648595c7aec1d281955392f34a1 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4: Split arguments/locals from temps.Erik Verbruggen2014-05-231-88/+120
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a couple of reasons to split the temporaries off from the arguments and locals: Temporaries are invisible, and changes to them cannot be observed. On the other hand, arguments and locals are visible, and writes to them can be seen from other places (nested functions), or by using the arguments array. So, in practice these correspond to memory locations. (One could argue that if neither nested functions, nor eval(), nor arguments[] is used, the loads/stores are invisible too. But that's an optimization, and changing locals/arguments to temporaries can be done in a separate pass.) Because of the "volatile" nature of arguments and locals, their usage cannot be optimized. All optimizations (SSA construction, register allocation, copy elimination, etc.) work on temporaries. Being able to easily ignore all non-temporaries has the benefit that optimizations can be faster. Previously, Temps were not uniquely numbered: argument 1, local 1, and temporary 1 all had the same number and were distinguishable by their type. So, for any mapping from Temp to something else, a QHash was used. Now that Temps only hold proper temporaries, the indexes do uniquely identify them. Add to that the fact that after transforming to SSA form all temporaries are renumbered starting from 0 and without any holes in the numbering, many of those datastructures can be changed to simple vectors. That change gives a noticeable performance improvement. One implication of this change is that a number of functions that took a Temp as their argument, now need to take Temp-or-ArgLocal, so Expr. However, it turns out that there are very few places where that applies, as many of those places also need to take constants or names. However, explicitly separating memory loads/stores for arguments/locals from temporaries adds the benefit that it's now easier to do a peep-hole optimizer for those load/store operations in the future: when a load is directly preceded by a store, it can be eliminated if the value is still available in a temporary. Change-Id: I4114006b076795d9ea9fe3649cdb3b9d7b7508f0 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Merge remote-tracking branch 'origin/release' into stableJani Heikkinen2014-04-231-3/+3
|\ | | | | | | Change-Id: I1214586499ab2876c8bc55a99367a0c938c8b919
| * V4: fix register usage on ARM.Erik Verbruggen2014-04-171-3/+3
| | | | | | | | | | | | | | | | | | | | | | JSC was using r3 as the address scratch register, which collides with the 4th parameter in a function call. This sometimes shows up when generateFunctionCall needs to do a calulated jump. Also fix the usage of r11, which seems to be the fp on some platforms. Change-Id: Ib2ea64b9342e5aa631db6a7641747f899b2fbd89 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 JIT: make call destination printing portable.Erik Verbruggen2014-04-151-0/+2
|/ | | | | Change-Id: I743a5730442bc6c2af1beac1c3f1287c50242263 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Use Q_ASSERT instead of assertLars Knoll2014-03-191-10/+10
| | | | | Change-Id: I6185b59a7dfd6977ce82581ab4385e07d78f13f6 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 JIT: fix stack space reserving codeErik Verbruggen2014-03-071-2/+2
| | | | | | | | sub32 will truncate the register's content, which is a bit problematic when the stack is located outside the first 4G (e.g. on win64). Change-Id: I8c2c55c0e08f4e5b67295ba6a8a26d7d55d4477f Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Fix MSVC2012 compiler warnings in disabled code.Erik Verbruggen2014-03-071-2/+4
| | | | | | | ... that should soon get enabled. Change-Id: I2f8393cab5e99a7f5d3c7df6af6385fefd2d4dd1 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* V4 JIT: enable register allocator on win32.Erik Verbruggen2014-03-041-2/+4
| | | | | Change-Id: I7134bd3721df0e000ad0bd135c01e76c55271156 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Move all binop related code into qv4binop*Lars Knoll2014-03-041-156/+0
| | | | | Change-Id: I8f96b8d570dd4c0139b0a2e595055b3b2c6dae70 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Remove unused codeSizesLars Knoll2014-03-031-2/+0
| | | | | Change-Id: I13c7d9dda7cd1e771079f6fdaa175008b3a3e0e5 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 JIT: fix MSVC warning.Erik Verbruggen2014-03-031-1/+1
| | | | | | | d:\dev\qt5-dev\qtdeclarative\src\qml\jit\qv4assembler_p.h(394) : warning C4146: unary minus operator applied to unsigned type, result still unsigned Change-Id: Iff972f419d7505ecedeb42b4b7eb456295225cb2 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Smaller cleanupLars Knoll2014-02-231-0/+2
| | | | | | | | | | Cleanup the code to generate a swapValues instruction to only require one code path for 32/64 bit. In addition, this seems to be slightly faster even on x86-64. Change-Id: I0584c3eb5249606ca7541abfbce227e5cb44711f Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Clean up our internal namespacesLars Knoll2014-02-231-91/+91
| | | | | | | | QQmlJS::MASM -> QV4::JIT QQmlJS::V4IR -> QV4::IR Change-Id: I707e8990459114a699c200fe3c22cec3c8df1afc Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Move binops out of the iselLars Knoll2014-02-221-0/+2
| | | | | | | | Move the binop handling into qv4binop* to clean up the code and ease maintenance. Change-Id: I0053380be7f326a2100302a63e921698a5b28c2a Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Move the Assembler class into it's own fileLars Knoll2014-02-221-0/+1478
Change-Id: I9968b3ae5ad5fbad3490e08e173c22e4a643c91f Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
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