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* Jit: fix unary minus for integersErik Verbruggen2017-06-071-0/+9
| | | | | Change-Id: Ib2cdfe6f09528d169e9ea6f8b872de875317c9c9 Reviewed-by: Simon Hausmann <simon.hausmann@qt.io>
* Optimize Runtime::method_get/setElementLars Knoll2017-05-101-2/+2
| | | | | | | | | | | | | This is now actually just as fast as the lookup code, so disable the generation of lookups for indexed accesses for now. This saves some runtime memory, as we don't need the data structures for the lookup. We can reintroduce lookups, once they offer a real performance benefit. Change-Id: Idc3fa7b248e2e25b4b2cd60d5053e2815634c8b7 Reviewed-by: Simon Hausmann <simon.hausmann@qt.io>
* Prospective build fix for architectures where we don't support the JITSimon Hausmann2017-05-071-1/+7
| | | | | | | | | | Always export the isel factory method for qmlcachegen, so that we can link. Task-number: QTBUG-60597 Change-Id: Ia348ee5dfe0892878e8fce6c8afd30bb8eb54a51 Reviewed-by: Dmitry Shachnev <mitya57@gmail.com> Reviewed-by: Robin Burchell <robin.burchell@crimson.no>
* Silence GCC 7 warnings about implicit fallthrough in Qt codeThiago Macieira2017-04-202-0/+3
| | | | | | | | | | | | | | | This only deals with Qt code. MASM has a lot of those left. We should just update from upstream instead to get the fixes. qv4regalloc.cpp:660:52: warning: this statement may fall through [-Wimplicit-fallthrough=] if (leftSource->type == DoubleType || rightSource->type == DoubleType) { ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ qv4regalloc.cpp:666:13: note: here case OpBitAnd: ^~~~ Change-Id: I7814054a102a407d876ffffd14b6b0e2d6b03689 Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
* Fix locals register allocation on ARM when cross-compilingSimon Hausmann2017-04-061-1/+1
| | | | | | | | r11 needs to be saved :). This ammends ecda87091f290daec34bee6b55dd9cf920ffdcff Change-Id: Ib69712527e04b9bcec4c9e74dea43a915e2bd0f9 Reviewed-by: Robin Burchell <robin.burchell@crimson.no>
* Fix double conversion code generation when cross-compilingSimon Hausmann2017-04-062-7/+15
| | | | | | | | | We can't use QV4_USE_64_BIT_VALUE_ENCODING for deciding how generate code for checking if the tag of a value contains the necessary mask to detect doubles. Change-Id: Id5a5c1b136313aa4dfd2c997898e97cd4ebaeb83 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Fix shadow stack space handling when cross-compilingSimon Hausmann2017-04-061-7/+1
| | | | | | | | | | | | | Both MIPS and X86-64 on Windows reserve space for four registers on the stack, that the called function may use to spill the parameters passed in registers. This needs to be handled without #ifdefs in order to support cross-compilation and from the looks of it it was also wrong on MIPS. Change-Id: If65a6a0f6f64b8536703d32e7678e30ad807f7c8 Reviewed-by: Julien Brianceau <jbriance@cisco.com> Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Fix architecture selection when cross-compiling cache filesSimon Hausmann2017-04-061-4/+4
| | | | | | | | | | We pass essentially the values of QSysInfo::buildCpuArchitecture() to qmlcachgen as command line parameters, so our factory function must be aligned with the values returned (and documented) there. That means arm instead of armv7, arm64 instead of armv8 and i386 instead of x86. Change-Id: I89c196b6585f9ba9550c0deb17e8b529980aa448 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Fix engine parameter passing when cross-compilingSimon Hausmann2017-04-061-1/+1
| | | | | | | | | | | We currently use addressForArgument() only to access the incoming functions parameters in JIT generated code, which is the engine parameter. While not currently supported by the current set of cross-compiling assemblers, the use of sizeof(Type*) may become an issue in the future, so let's use the correct value right away. Change-Id: I3e44279257f595a8be2c61bcfe15070a90038eb7 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Fix loading of strings when cross-compiling from 64-bit host to 32-bitSimon Hausmann2017-04-061-1/+1
| | | | | | | | The use of sizeof(Type*) is not allowed when calculating indices into pointer arrays. Change-Id: I5531efc80d0267eaceade76ad2b96d454eab9392 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Fix Clang warning about member in template class not definedThiago Macieira2017-04-032-3/+3
| | | | | | | | | | | | qv4isel_masm.cpp:285:44: warning: instantiation of variable 'QV4::JIT::Assembler<QV4::JIT::AssemblerTargetConfiguration<JSC::MacroAssemblerX86_64, QV4::JIT::TargetOperatingSystemSpecialization::NoOperatingSystemSpecialization>>::Void' required here, but no definition is available [-Wundefined-var-template] Depending on qv4assembler.cpp instantiating the same template that q4isel_masm.pp required is fragile. So move the definition to the header, next to the class. Change-Id: I27b55fdf514247549455fffd14b178ec9d4b508d Reviewed-by: Simon Hausmann <simon.hausmann@qt.io>
* Fix encoding of primitive constants when cross-compilingSimon Hausmann2017-03-313-32/+35
| | | | | | | | | | QV4::Primitive is using host value encoding, which can differ from the target. The source of QV4::Primitive in the code generator is usually IR::Const, transformed via convertToValue(). That function becomes a template that converts to a simple target primitive type. Change-Id: If028aea9551d77d81eec306f60fd995c25b76710 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Fix value type encoding constant usage when cross-compilingSimon Hausmann2017-03-303-24/+30
| | | | | | | | | | | | | | | Our two value encodings use different masks for the upper 4 bytes. Depending on the target architecture we must use different values when generating code that uses these masks. This patch replaces the #ifdef'ed ValueTypeInternal_* enum values with two C++11 scoped enums that allows for the co-existence of both throughout the code base as well as selective use in the code generators. Change-Id: I380c8c28b84df2874cca521b78bfe7f9388ed228 Reviewed-by: Qt CI Bot <qt_ci_bot@qt-project.org> Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Fix stack pointer arithmetic when cross-compilingSimon Hausmann2017-03-291-1/+1
| | | | | | | | | | Replace the use of size(void*) with target assembler specific values for the pointer size, when calculating offsets into the stack for poke/peek/push/pop and placing arguments onto the stack before calling functions. Change-Id: I3aff540f0083967e75b61e0c29dbeb4d9ecfa433 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Simplify function prologue code in the JITSimon Hausmann2017-03-291-3/+1
| | | | | | | | | We don't have to do a engine->current->engine dance to get hold of the engine pointer, in order to update jsStackTop. We have a dedicated engine register :) Change-Id: I187ea67bf9f3e43b0048dca3cd6ee35f70d8737c Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Minor cleanup: Remove unused functionSimon Hausmann2017-03-291-7/+0
| | | | | Change-Id: Ie8d0c7b360ff120f381e33439037cf7b01257456 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Fix manual register allocation when cross-compiling for ARMv7Simon Hausmann2017-03-291-3/+3
| | | | | | | | Let's assume that we always generate thumb2 code. I'm not even sure that we still support plain ARM anyway. Change-Id: Ie7ec4d1de8f9f6cb86d80193990e492782ff2cf2 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Add support for showing disassembly for cache mapped codeSimon Hausmann2017-03-291-0/+6
| | | | | Change-Id: I6199d624a23e2e1b67bcbb841f0bc999880a3993 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Complete transition to standard layout classes for JIT accessSimon Hausmann2017-03-211-1/+1
| | | | | | | | | | | | Move the Runtime function pointer array into EngineBase so that we can eliminate the last use of qOffsetOf. For improved cache locality the memory manager point is now also located in the EngineBase. Change-Id: I0b3cf44c726aa4fb8db1206cc414a56c2f522a84 Task-number: QTBUG-58666 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Protect CallContext member usage against word size differencesSimon Hausmann2017-03-171-1/+2
| | | | | | | | | | | Ensure the offsets we're taking from ExecutionContext members in the JIT code generator can be translated from host architecture sizes to target architecture, using assertions and a memory layout that we already have in the dev branch with commit 4de7e48ab160dacc7a09360e80264eac4945a8f4. Change-Id: I1b26ef265234b05a6e5c8688a8aad2f33cd28783 Task-number: QTBUG-58666 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Protect ExecutionContext member usage against word size differencesSimon Hausmann2017-03-173-9/+13
| | | | | | | | | | | Ensure the offsets we're taking from ExecutionContext members in the JIT code generator can be translated from host architecture sizes to target architecture, using assertions and a memory layout that we already have in the dev branch with commit 4de7e48ab160dacc7a09360e80264eac4945a8f4. Task-number: QTBUG-58666 Change-Id: I26cdbd1ddb995b116624fab16f7caba5d21c13b5 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Protect CompilationUnit member usage against word size differencesSimon Hausmann2017-03-171-1/+1
| | | | | | | | | Currently we only use the runtimeStrings offset in JIT generated code, so move that into a standard layout base class and use that instead. Task-number: QTBUG-58666 Change-Id: Id933ba5df3a6990e89886c2b328e9e814ec5e413 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Protect Lookup usage against cross-compilation word size differencesSimon Hausmann2017-03-171-5/+5
| | | | | | | | | The offsets we're taking from Lookup in the code generator are always zero, but with static assertions we can ensure that they stay that way. Task-number: QTBUG-58666 Change-Id: I91e047d2101ba33e36aaada4a5adc75e20fea7d8 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Protect CallData usage against cross-compilation word size differencesSimon Hausmann2017-03-171-4/+4
| | | | | | | | | | Ensure via static asserts that the members always have the same offsets. Since the class has standard layout, we can also use the C++11 offsetof macro instead of qOffsetOf. Task-number: QTBUG-58666 Change-Id: I7dcecf517c771c7081334cd9d0b7ae133b23b23a Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Prepare run-time method calling mechanism for cross-compilationSimon Hausmann2017-03-175-14/+15
| | | | | | | | | | | | | | | | | | | The current way of encoding the offsetof() of the method_ members in QV4::Runtime is not portable when cross-compiling from a 64-bit host (where the offsetof would be calculated on) to a 32-bit target (where the offset would be different), or vice versa. In preparation for making this work, this patch first replaces the direct use of the run-time members with use through a void * and an enum for indexing. This gives us some type-safety in some places and will also allow for a translation of the pointer offset from host pointer indexing to target pointer indexes. As a bonus we can avoid going through the engine->runtime indirection in the interpreter altogether and call the static methods right away. Task-number: QTBUG-58666 Change-Id: I3cd6459523923a9719408317fa729bca19c2bf3c Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Fix running of 32-bit JIT code generated on 64-bit hostsSimon Hausmann2017-03-173-11/+17
| | | | | | | | | | | | | | | The offsets of members encoded in JIT generated code differ between 32-bit and 64-bit architectures. This patch moves some of the ExecutionEngine members into a separate standard-layout EngineBase class (in line with the same class in commit 2a554434a571dcefd26cf10ef8c5ae8b3b7d66db and subject to merging). By ensuring that the members are stored at pointer intervals, we can translate from host pointer size to target when generating the code. Task-number: QTBUG-58666 Change-Id: I1c38a7da059826848b80fd9972ed073214501386 Reviewed-by: Qt CI Bot <qt_ci_bot@qt-project.org> Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Merge "Merge remote-tracking branch 'origin/5.8' into 5.9" into refs/staging/5.9Simon Hausmann2017-02-241-3/+5
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| * Merge remote-tracking branch 'origin/5.8' into 5.9Liang Qi2017-02-241-3/+5
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: src/qml/compiler/qv4ssa.cpp src/quick/accessible/qaccessiblequickview_p.h src/quick/items/qquickmousearea.cpp src/quick/util/qquickanimatorjob.cpp tools/qmlplugindump/main.cpp Change-Id: I84474cf39895b9b757403971d2e9196e8c9d1809
| | * Fix move ordering while resolving edges in register allocationErik Verbruggen2017-02-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When register allocation on an IR in SSA form is done, the last step is to turn the Phi nodes into moves and swaps and put those instructions in the predecessors. As the Phi nodes are conceptually "executed in parallel", this can result in cycles: r1 <- r0 r0 <- r1 These have to be turned into a swap instruction. Also, the moves have to be ordered in order to make sure that no values are overwritten: r1 <- r0 r2 <- r1 Here the two moves need to be switched. The comments in the code document the algorithm. Change-Id: I4151988681f7554b00a3eb70d224e6e2f29ebf04 Reviewed-by: Simon Hausmann <simon.hausmann@qt.io>
| | * Fix libs build with msvc on Chinese locale on WindowsLiang Qi2017-02-011-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chinese locale means Code Page 936 here. It's also related with removing C4819 warnings. And it's also following Conventions in Qt source code: All code is ascii only (7-bit characters only, run man ascii if unsure) See also http://wiki.qt.io/Coding_Conventions Task-number: QTBUG-56155 Task-number: QTBUG-58161 Change-Id: I1c38a6ce74670716f730663edbcdec3919b438c2 Reviewed-by: Friedemann Kleint <Friedemann.Kleint@qt.io>
* | | V4 JIT: Store the NaNEncodeMask in a register on 64bitErik Verbruggen2017-02-243-18/+35
|/ / | | | | | | | | | | | | | | | | | | When a callee saved register is available on 64bit platforms, put the Value::NaNEncodeMask in it. This saves one instruction for every load or store of doubles. Change-Id: I57262988610996e6a912e97d3026d4bb8ce26fe8 Reviewed-by: Simon Hausmann <simon.hausmann@qt.io> Reviewed-by: Qt CI Bot <qt_ci_bot@qt-project.org>
* | Add Q_ALLOCA_VAR, Q_ALLOCA_DECLARE and Q_ALLOCA_ASSIGN macrosKimmo Ollila2017-02-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | Define Q_ALLOCA_VAR macro to be used instead of #ifdeffing the occurrences of alloca() in case it's not supported. Q_ALLOCA_DECLARE and Q_ALLOCA_ASSIGN macros separate memory allocation from the declaration and RAII. Change-Id: Idc7551642c48a968a44bcade14d84800a3a1270e Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@qt.io> Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Remove unnecessary assignment of binop results to temporariesErik Verbruggen2017-02-151-1/+0
| | | | | | | | | | | | | | | | | | | | | | In many cases, the result can be directly assigned to the left-hand side. So leave it to the place where the binop is used to decide when to assign it to a temporary. Change-Id: I9a88a71a77aa73afe88007eca744d3782fca34ac Reviewed-by: Simon Hausmann <simon.hausmann@qt.io> Reviewed-by: Lars Knoll <lars.knoll@qt.io> Reviewed-by: Qt CI Bot <qt_ci_bot@qt-project.org>
* | Enable register allocator on Win64Erik Verbruggen2017-02-141-13/+18
| | | | | | | | | | | | Change-Id: I4474f1ce01a6daa7cf4fb431f100cb8a9e094d6b Reviewed-by: Qt CI Bot <qt_ci_bot@qt-project.org> Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Prospective fix for native ARMv7 and ARM64 buildsSimon Hausmann2017-02-103-0/+12
| | | | | | | | | | | | | | | | | | | | | | Don't try to instantiate the presumed "cross-assembler" twice, and also exclude the Yarr JIT from the devtools build. It requires a loadPtr enabled assembler (disabled in V4_BOOTSTRAP builds) and we don't need the regexp engine. Change-Id: I3f36b32decdbf51133b8fef641f5630c5f5102b1 Reviewed-by: Samuli Piippo <samuli.piippo@qt.io> Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Remove remaining ARM #ifdef in qv4assembler.cppSimon Hausmann2017-02-082-16/+38
| | | | | | | | | | | | | | | | | | The thumb2 workaround for cleaning up the frame pointer can go into the target platform template specialization. Task-number: QTBUG-58572 Change-Id: Ib852481358e320efdfd49270f3bc5a5d2ee2b7fd Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Fix ARM64 buildSimon Hausmann2017-02-085-3/+7
| | | | | | | | | | | | | | | | | | Add the ARM64 assembler to cross-compilation. Task-number: QTBUG-58568 Change-Id: I91461ebf79fb83e31e8ae2962ab0e155d308281a Reviewed-by: Qt CI Bot <qt_ci_bot@qt-project.org> Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Enable cross-compiling binops from 32-bit host 64-bit targetSimon Hausmann2017-02-081-58/+135
| | | | | | | | | | | | | | | | | | | | Move the #if CPU(X86) specific bits into a template specialization, so that we won't try to call 32-bit specific methods on the assembler when targeting a 64-bit architecture. Change-Id: I3b7e6c2c77d8a34ef50913cbfd34dad2c3199923 Reviewed-by: Qt CI Bot <qt_ci_bot@qt-project.org> Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Fix register argument passing in cross-compiled code when host == x86Simon Hausmann2017-02-073-13/+4
| | | | | | | | | | | | | | | | | | Replace the use of host-dependent pre-processor macro with variable usage from the target platform template specializations. Task-number: QTBUG-58577 Change-Id: I7e5ca4b79c2238954d6be7ec6b110eadd78a104d Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Fix assembler cross-compilation on 32-bit hostsSimon Hausmann2017-02-076-15/+29
| | | | | | | | | | | | | | | | | | The GOT register restoring logic needs to be done via TargetPLatform members instead of plain #ifdefs. Task-number: QTBUG-58569 Change-Id: If00d3f92558361ad5dcb20c3ff7eff78d31d75d3 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Eliminate VALUE_FITS_IN_REGISTER #ifdefSimon Hausmann2017-02-063-39/+46
| | | | | | | | | | | | | | | | | | | | These macros do not apply anymore when cross-compiling. This patch replaces the macro use for locals JS stack initialization with register size dependent operations as well as when loading the this object into a stack slot. Change-Id: Ia986f6dbfa37c6d6ce2f1de6253e7008e4aa87dd Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Allow selecting armv7 as target architecture in qmlcachegenSimon Hausmann2017-02-011-3/+26
| | | | | | | | | | Change-Id: I36e8f95e83ea3de6553145efc762e3bc46f60071 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Added the ARMv7 cross-assembling JIT::ISel to the qmldevtools buildSimon Hausmann2017-02-011-0/+5
| | | | | | | | | | Change-Id: Ib508ad7a02293b0deead818bb0eb3bdfb474a278 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Include the ARMv7 assembler in the qmldevtools bootstrap buildSimon Hausmann2017-02-014-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even when the C++ target is not ARMv7 we want to include it in order to be able to generate QML cache files with code ahead of time. This requires a few changes: * The Jump classes need to move from the AbstractMacroAssembler super-class into the concrete assembler sub-class, in order to use it in specializations. * Some of the template specializations in LinkBuffer for example or for platform dependent operations need to be pre-processor enabled when bootstrapping * The generic loadPtr/addPtr etc. functions need to move to the concrete assemblers to be able to call the correct 32-bit or 64-bit variations. * We need to force what looks like a loss of precision to the compiler in the 32-bit ARMv7 linking code when linking jumps. Finally then we can explicitly instantiate at least QV4::JIT::Assembler for ARMv7 when bootstrapping. Currently only on x86-64 hosts, but that is a temporary limitation. Change-Id: I501db2360e1fded48f17f17d9e87252d47f8537e Reviewed-by: Simon Hausmann <simon.hausmann@qt.io>
* | Remove platform ifdefs for ISE::convertTypeToDoubleSimon Hausmann2017-01-312-16/+28
| | | | | | | | | | Change-Id: I75db85fbd601d4790a3cb9af483474a976d00e86 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Remove platform ifdefs for generateCJumpStrictUndefinedSimon Hausmann2017-01-313-42/+38
| | | | | | | | | | | | | | | | Use templates to perform the platform encoding dependent way of comparing a given value against undefined. Change-Id: I7e7726455023200bd74e62d2dbc4e2c2908d9e64 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Remove platform ifdefs in JIT::ISel::visitRetSimon Hausmann2017-01-313-138/+132
| | | | | | | | | | | | | | | | Use templates to encode the various platform dependent ways of encoding the return values. Change-Id: Icb481a75924da7d78396ff1c95474dc9c29ca494 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Eliminate platform #ifdef for loading stringsSimon Hausmann2017-01-312-7/+13
| | | | | | | | | | | | | | | | Use templates to abstract the two different ways of making a QV4::Value hold the address of a managed, in this case to a runtime string. Change-Id: Ibe9ae10fdcef68dbfc7c61fbb3ec8b3a1d50f1a2 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Make the JIT ISelFactory a templateSimon Hausmann2017-01-312-2/+11
| | | | | | | | | | | | | | | | That way qmldevtools can - in the future - instantiate that also for the cross-compilation targets. Change-Id: If15b195f24e54226dc4f2fd9f0ad6874f44cb5af Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* | Fix intermixed 32-bit/64-bit buildSimon Hausmann2017-01-311-4/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | Replace the use of TrustedImmPtr(0) with target register size dependent template functions, as TrustedImmPtr is forbidden for non-zero values (non-relocatable code) and for zero still ends up using functions in the underlying assembler that are behind #ifdefs. Similarly the use of xorPtr does not compile with ARMv7, so use the zeroRegister abstraction instead. Change-Id: I84c1792847bd51d1cf5f305c3589517583b816f3 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
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