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* Update copyright headersJani Heikkinen2015-02-1212-84/+84
| | | | | | | | | Qt copyrights are now in The Qt Company, so we could update the source code headers accordingly. In the same go we should also fix the links to point to qt.io. Change-Id: I61120571787870c0ed17066afb31779b1e6e30e9 Reviewed-by: Iikka Eklund <iikka.eklund@theqtcompany.com>
* V4: change regalloc hints to be a QVarLengthArray.Erik Verbruggen2015-01-231-7/+13
| | | | | | Change-Id: I0541431dee0ce4575df56d952a3a9a2ab9fca01d Reviewed-by: Robin Burchell <robin.burchell@viroteck.net> Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* QML: Fix MSVC 2013/64bit warnings.Friedemann Kleint2015-01-221-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | compiler\qv4ssa.cpp(687) : warning C4267: 'argument' : conversion from 'size_t' to 'int', possible loss of data compiler\qv4ssa.cpp(950) : warning C4267: 'initializing' : conversion from 'size_t' to 'int', possible loss of data compiler\qv4ssa.cpp(1117) : warning C4267: 'return' : conversion from 'size_t' to 'unsigned int', possible loss of data compiler\qv4ssa.cpp(1120) : warning C4267: 'return' : conversion from 'size_t' to 'unsigned int', possible loss of data compiler\qv4ssa.cpp(1148) : warning C4267: 'initializing' : conversion from 'size_t' to 'unsigned int', possible loss of data compiler\qv4ssa.cpp(1266) : warning C4267: 'initializing' : conversion from 'size_t' to 'unsigned int', possible loss of data compiler\qv4ssa.cpp(1622) : warning C4267: 'initializing' : conversion from 'size_t' to 'int', possible loss of data compiler\qv4ssa.cpp(2246) : warning C4267: 'initializing' : conversion from 'size_t' to 'unsigned int', possible loss of data compiler\qv4ssa.cpp(4289) : warning C4267: 'initializing' : conversion from 'size_t' to 'int', possible loss of data compiler\qv4ssa.cpp(4351) : warning C4267: 'initializing' : conversion from 'size_t' to 'unsigned int', possible loss of data jit\qv4regalloc.cpp(1383) : warning C4267: 'argument' : conversion from 'size_t' to 'int', possible loss of data jit\qv4regalloc.cpp(1769) : warning C4267: 'initializing' : conversion from 'size_t' to 'int', possible loss of data jit\qv4regalloc.cpp(1814) : warning C4267: 'initializing' : conversion from 'size_t' to 'int', possible loss of data jsruntime\qv4mm.cpp(496) : warning C4267: 'initializing' : conversion from 'size_t' to 'int', possible loss of data jsruntime\qv4mm.cpp(503) : warning C4267: 'initializing' : conversion from 'size_t' to 'int', possible loss of data jsruntime\qv4mm.cpp(506) : warning C4267: 'initializing' : conversion from 'size_t' to 'int', possible loss of data jsruntime\qv4regexp.cpp(60) : warning C4267: 'return' : conversion from 'size_t' to 'uint', possible loss of data jsruntime\qv4typedarray.cpp(85) : warning C4309: '=' : truncation of constant value Change-Id: I0b04e1a9d379c068fb3efe90a9db8b592061e448 Reviewed-by: Erik Verbruggen <erik.verbruggen@theqtcompany.com> Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 JIT: ARM: move registers around.Erik Verbruggen2015-01-121-2/+2
| | | | | | | | | | | | | | | | In 6572d4e50d73ac60a8974d07de74c27a7f99ebef we moved the addressTempRegister to r10, and in d8b276a59402cbbe6d070ba38805350e7f3dd8a1 we made sure that the YarrJIT saves it too. JSC solved this by moving it to r6, which is already saved by the YarrJIT. To make a future update of the assembler easier, we also move it to r6. This requires that we move our scratch register too. But, because it is used a lot, we don't want it above r7 for Thumb2 reasons. Therefore, we move the engine to r10, and the scratch register to r5. Change-Id: I35be539940d9fe80971973cfa7f3a8dab2196a1e Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* QML 3rdparty: revert unnecessary change.Erik Verbruggen2015-01-121-2/+3
| | | | | | | | It is the change to DataLog.h, which in turn forces the other changes in order to match types. Change-Id: Ie17e7efbd6a4d380a3b7383b0fd0243c6f68d0d5 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 JIT: Hoist QVector allocation out of a loop.Robin Burchell2015-01-091-1/+3
| | | | | | | Use erase() each loop iteration, but preserve the underlying allocation. Change-Id: I673766f5567794215465daa597a4839a4900450b Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Fix build on MinGWKonstantin Ritt2014-12-281-0/+3
| | | | | | | | - alloca() needs malloc.h - crtdbg.h couldn't be found on MinGW Change-Id: Ibbf91a58d39ef1e2572baae3c409393acf7aa5df Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Cleanup code that modifies the JS stackLars Knoll2014-12-191-3/+24
| | | | | Change-Id: Ic043e256c3df984bb06c9a16b86573b0173b19a1 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Replace usage of stdout for debug output by qDebugErik Verbruggen2014-12-192-26/+63
| | | | | | | | This way even paranoid Androids can be show interesting stuff. Task-number: QTBUG-43109 Change-Id: Ib0ef9e8f6c6fc66e9ea9bfcaf2cd9e33d7469070 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Merge remote-tracking branch 'origin/5.4' into devSimon Hausmann2014-12-091-7/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: src/qml/jsruntime/qv4arraydata.cpp src/qml/jsruntime/qv4context_p.h src/qml/jsruntime/qv4globalobject.cpp src/qml/jsruntime/qv4internalclass.cpp src/quick/items/qquicktext_p.h src/quick/items/qquicktextedit_p.h src/quick/items/qquicktextinput_p.h Change-Id: If07e483e03197cb997ef47a9c647a479cdb09f4c
| * Fix crashes on QNX/x86Simon Hausmann2014-12-031-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On x86 we assume that ebx holds the address of the global offset table for position independent code. So before placing a run-time call we restore the register from it's position we saved it on earlier on the stack. However after commit d9f33ccdef985badc56fd8940373748626beffc7 the register wasn't saved on the stack anymore in the prologue because we skipped because it's caller saved. So when we seemingly reloaded ebx with the GOT from the stack, we loaded it from a location we never saved it to. This patch makes sure to always save it on the stack so that we can always restore it. Change-Id: I8f6a8e38779151fff517f17220f29a7cb45ca89d Task-number: QTBUG-43036 Reviewed-by: Erik Verbruggen <erik.verbruggen@theqtcompany.com>
* | Fix run-time string handling with regards to the new heapSimon Hausmann2014-11-213-24/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changed runtimeStrings to be an array of Heap::String pointers instead of indirect String pointers. Later that member along with other GC related members will go into a managed subclass. Meanwhile the generated code no more loads String pointers directly but just passes the index into the run-time strings to the run-time functions, which in turn will load the heap string into a scoped string. Also replaced the template<T> Value::operator=(T *m) with a non-template overload that takes a Managed *, in order to help the compiler choose the non-template operator=(Heap::Base *) overload. This allows removing a bunch of Value::fromHeapObject calls. Change-Id: I20415c0549d33cca6813441a2495976b66d4c00e Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* | Change signature or runtime methods to take an engine pointerLars Knoll2014-11-125-81/+85
| | | | | | | | | | | | | | | | | | This makes a lot more sense in the long term and is the more maintainable solution, once the GC starts moving objects around in memory Change-Id: I8f327c0f5b5b0af38c5fe1a217852ee8c4a5c2fc Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | Refactor ExecutionContextsLars Knoll2014-11-082-5/+5
| | | | | | | | | | | | | | Move the Data class out into the Heap namespace. Change-Id: I2b798deb53812a08155c92a0e6ef2dcd2ea137b8 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | Changed Value to store Managed::Data pointers directlySimon Hausmann2014-11-041-2/+2
|/ | | | | | | | This is a step towards storing direct heap object pointers for the values on the JS stack, to avoid the costly indirection for data access. Change-Id: Ibb57ed6cf52a7088bbc95ee04ae3a4cb25b8c045 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Fix QQmlExpression/QQmlScriptString/QQmlBinding crashesSimon Hausmann2014-10-092-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | In the QQmlScriptString we store the binding id and it is an index into the runtimeFunctions array of the compilation unit. However we don't store the compilation unit and instead in QQmlBinding and QQmlExpression try to retrieve it from the cache via the context url (we have the context after all). That turns out to be not a reliable way, as sometimes the URL might slightly differ from the originally compiled cache (qrc:/// turning to qrc:/ maybe). Consequently the type is (unnecessarily) compiled again and unfortunately not _linked_, therefore the runtime functions array is empty. Another option is that when the component was created from a QByteArray, then no entry exists in the cache in the first place. This patch addresses the problem by storing a reference to the compilation unit in the QQmlContextData. That we can safely retrieve and it'll make sure the compilation unit also stays alive. In the process of that the manual reference counting was switched over to QQmlRefCount and QQmlRefPointer for QV4::CompilationUnit. Task-number: QTBUG-41193 Change-Id: I9111f9a3b65618e453954abcd789c039e65a94f7 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Replace vsnprintf with qvsnprintf.Bjoern Breitmeyer2014-09-191-1/+1
| | | | | | | | Windows CE does not have vsnprintf, so use qvsnprintf instead. Change-Id: I30ddbf2469424ec174903f0cce2b482c652b5d22 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 JIT: fix stack layout.Erik Verbruggen2014-08-261-13/+15
| | | | | | | | | | | | | | | | | Commit d9f33ccdef985badc56fd8940373748626beffc7 introduced an off-by-one in the calculation of the offset of a saved register (in StackLayout::savedRegPointer), resulting in overwriting a callee saved register with the tag of a QV4::Value. This method now calculates those pointers relative to the bottom of the stack frame. The off-by-one didn't happen before that patch, because there was a magical +1 used in the constructor for the number of callee saved registers, thereby prevented this from happening. However, that resulted in a frame size that was unnecessary big. Task-number: QTBUG-40927 Change-Id: If88fe9f3490a4d23a1e69c630c87219fcfef671f Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Update license headers and add new licensesJani Heikkinen2014-08-2512-223/+127
| | | | | | | | | - Renamed LICENSE.LGPL to LICENSE.LGPLv21 - Added LICENSE.LGPLv3 & LICENSE.GPLv2 - Removed LICENSE.GPL Change-Id: I84a565e2e0caa3b76bf291a7d188a57a4b00e1b0 Reviewed-by: Jani Heikkinen <jani.heikkinen@digia.com>
* V4 JIT: fix int32 to double conversion codeErik Verbruggen2014-08-141-2/+4
| | | | | | | Missing else: two (nearly identical) conversions would get generated. Change-Id: I745120f81d42bf28fbce7ab6a62da909a8e14458 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 JIT: add d8-d15 as available FP registers on ARM.Erik Verbruggen2014-08-141-1/+8
| | | | | | | | | | VFP3-d16 is the minimum implementation available on ARMv7, so these registers are also always available. The big added bonus is that they are callee saved, so using them will result in less loads/stores for doubles. Change-Id: I0cab3fe24d8677315b4c7d9449d8619cbf9a2919 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 JIT: support saving used callee saved FP registers.Erik Verbruggen2014-08-144-21/+46
| | | | | | | | This is not used yet by any platform/abi we support, because we do not define any callee-saved FP registers. Yet. Change-Id: I5857a452456175398c5e9681ff33800b9431b9da Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 JIT: calculate used registers and only save those.Erik Verbruggen2014-08-143-2/+37
| | | | | | | | | Instead of saving all possibly used ones. Note that floating point registers are not saved yet, as we don't support callee-saved FP registers yet. Change-Id: I1db2ba2513f7b466c64ec103eda0c464269247b0 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* V4 JIT: parameterize the prologue and epilogue generationErik Verbruggen2014-08-146-69/+84
| | | | | | | | | ... with the regular (non-FP) registers that need to be saved. This patch shouldn't change any of the JIT generated code, because all regular callee saved registers are passed in. Change-Id: Id11b8f37f06d80e8015ac6f0d0ccefdfa3342cbe Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* Merge remote-tracking branch 'origin/5.3' into 5.4Frederik Gladhorn2014-08-141-3/+2
|\ | | | | | | Change-Id: I2e06c2fcd8aa9d5d090f0568be75272ec82f7b20
| * V4 JIT: fix JS stack frame size calculation.Erik Verbruggen2014-08-131-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | StackLayout::calculateJSStackFrameSize now returns the size in number of QV4::Value items, instead of bytes. The value is then multiplied in the assembler by sizeof(Value) to get the number of bytes. Previously, the return value was number of bytes, which also got multiplied. A direct effect is that the JS stack size will be ~87% smaller, with the nice effect that the GC will run faster (less roots on the stack). It also won't retain objects whose reference accidentally ended up on the stack below the used portion for the current function, so possibly freeing (more) objects (earlier) than before. Change-Id: Idd5a9c173e641c03e6b8a6fe743e403eda34dfe0 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
| * V4 JIT: fix usage of d1 on ARM.Erik Verbruggen2014-05-261-1/+0
| | | | | | | | | | | | | | | | | | | | The d1 register is used by the JIT as a scratch register, so it is not available for the register allocator. If it would be used for register allocation, the JIT code generation might override it with something else, thereby clobbering the result. Change-Id: Iaf7db873d78e84c28ac9ea341f9d6da76330fe81 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 JIT: fix stack use below stack pointerErik Verbruggen2014-08-141-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | When storing a double value returned from a function call on platforms where the value wouldn't fit in a register, we used to store it on the stack and then load it into a FP register. This stack use was done without first lowering the stack pointer. For x86 and ARM, the value is loaded directly into the FP register, and for other non-64-bit platforms it correctly allocates the stack slot. Change-Id: Idbc260038958a036ac2a7383d845199626decc8e Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 IR: change IR printing to be more readable.Erik Verbruggen2014-08-131-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New structure: - "comments" now start with a semi-colon, and have a list of key: values. ; predecessors: L17 L26 L36, loop_header: yes ; line: 30, column: 3 - when a temporary has a known type, it is written in front of the teporary when it is being assigned, and not repeated. var %109 = this double %42 = 42 - an expression starts with the operation, followed by the operands that are separated by commas. The type of the operands is the type mentioned when they are assigned. int32 %115 = sub %184, %185 if gt %27, 0 goto L40 else goto L41 - conversions do mention the operand type in order to make them easier to read. double %178 = convert var to double %60 - phi node operands are prefixed by the from-label to make it easy to match those operands with the from-block. double %62 = phi L35: %58, L34: %61 - all names except for "this" and built-ins are prefixed by a dot in order to make it clear that a lookup will occur, just like member accesses. $6 = call .int2char($0) %7 = this %8 = %7.toString() Change-Id: I9f626a91f97ca7c3f27e01a5539f3c4fc10a46b4 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 RegAlloc: fix callee saved register range handlingErik Verbruggen2014-08-131-15/+19
| | | | | | | | | | | | | | | | | | | | This makes sure that the index of the fixed(FP)RegisterRanges matches the indexes for normal-/fpRegisters, because this index is used to check if a chosen register intersects with a fixed (= caller saved) register at call sites. Change-Id: Ie31554dbe8ed99cb38ca6b2506da663be41d82f6 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 RegAlloc: fix use position calculation for phi node arguments.Erik Verbruggen2014-08-131-11/+8
| | | | | | | | | | | | | | The correct calculation was already done, but the value was discarded. Change-Id: I600aeb9414736a3b7924a4a607233ab9bf6c02b6 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 JIT: tweak generated int32 to double conversion codeErik Verbruggen2014-08-131-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the target is a FP register, and the source is a memory address, do not load the int32 ourselves, but leave it to the assembler to decide what to do. On x86(_64) this is generates a single instruction, while on ARM the assembler will insert a load on its own. For the case where the target is not a FP register, use the return value register as base register for the target address. The advantage is that the address calculation is now independent of the preceding conversion, so it can fit in a different pipeline without dependencies. Change-Id: Ib7cefa636274ba8596e4d11ae0170a091a0def3e Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 JIT: generate code for int32 comparisons.Erik Verbruggen2014-08-125-5/+48
| | | | | | | | | | Change-Id: I5e88fb3df7b01f4f515ce4d2e451a5a6f5ba92ad Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 JIT: fix LookupCall on ARMErik Verbruggen2014-08-122-15/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To generate a LookupCall, the register r8 was used on ARM instead of the ReturnValue register. The reason is that the ReturnValue register is also the register for the first argument. However, now that we use callee-saved registers (r8 among them), this would clobber any value stored in r8. The fix is to actually use r0 to calculate the value, because the first argument holds the lookup table, and the call is relative to that. This leaves r8 free to be used by the register allocator. Change-Id: I5095bf69d27e16111ad32d9e5d5691c7bce14516 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 JIT: tune generated instructions for inplace binopsErik Verbruggen2014-08-125-208/+269
| | | | | | | | | | | | | | | | | | | | Generate better code for in-place binary operations where the right-hand side is either a constant or a memory address. Now that the JIT can do this, also tell the register allocator not to un-spill that right-hand side. Change-Id: I0ab852f6b92f90dfed99c05fbaf91aad2549ecf4 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | Accelerate property lookups for C++-based QObject singletons.Michael Brasser2014-08-073-3/+6
| | | | | | | | | | Change-Id: Icbdf06a077014db5dd57cba42f84591433ec4196 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 IR: fix printing with register information.Erik Verbruggen2014-07-241-4/+10
| | | | | | | | | | | | | | | | | | The register numbers for non-FP registers overlap with the FP ones. So when keying a single mapping on number, this resulted in the FP ones overwriting the non-FP ones. This patch splits the mapping in two. Change-Id: I95042b52a423eaaa96ed55d6c8ef12a2eb99f191 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 RegAlloc: do not add duplicate register hintsErik Verbruggen2014-07-241-5/+17
| | | | | | | | | | Change-Id: Id4b9b9481fe5c6b9cdab077b3957a0442fcff547 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | Convert Execution contexts to new constructor syntaxLars Knoll2014-07-221-1/+1
| | | | | | | | | | Change-Id: I4bc6a61b7a96139353e20871ff7ff007822c64c3 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | Get rid of StringRefLars Knoll2014-07-222-3/+2
| | | | | | | | | | | | | | | | Remove the Ref classes, as they won't be required anymore once Managed and Managed::Data are separated. Change-Id: Ic6bec2d5b4ecf2595ce129dbb45bbf6a385138a5 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | Convert ExecutionContext to new storage schemeLars Knoll2014-07-223-11/+11
| | | | | | | | | | Change-Id: I9fcc13da5360f37cef3149b114ed9263b9b74281 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | qml: Make ownership of CompiledUnit more clearHolger Hans Peter Freyther2014-07-212-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | The coverity scan utility didn't understand the code flow and assumed the compiledData would be leaked. Use a QScopedPointer and have the ::backendCompileStep() forward the ownership. From what I see the code has not leaked memory. Fixes: CID 10605, CID 10607 Change-Id: I7759f681871bbe12e2aa320a5f39c47c70f4e4e0 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | Make sure JIT architectures lists are in syncDmitry Shachnev2014-07-071-1/+3
| | | | | | | | | | | | | | | | | | We have two lists: in qv4global_p.h and qv4targetplatform_p.h. This commit blacklists OSes on x86 and x86_64 where JIT is not supported, improves support for FreeBSD and adds cross-references between these two files. Change-Id: Id3715a2ab717186e510a54e5a548dfa22120cd87 Reviewed-by: Erik Verbruggen <erik.verbruggen@digia.com>
* | V4 JIT: add IR printer that uses platform register names.Erik Verbruggen2014-06-243-3/+42
| | | | | | | | | | | | | | | | | | After running register allocation, the IR is printed one last time (when the environment variable QV4_SHOW_IR is set). This will now use the platform defined register names, e.g. "ebx" or "d2". Change-Id: I2f2f4536d1de940a69690056e5165d38fa7910bb Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* | V4 JIT: add some documentation and literature references.Erik Verbruggen2014-06-192-0/+31
| | | | | | | | | | Change-Id: I67667b74672b94b951361bf2a446476edf44b826 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* | V4 JIT: add hint for phi-node operands.Erik Verbruggen2014-06-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Not only is it preferable for the target of a phi-node to be stored in the same location as one of the sources, but the same yields for the sources. For example, in a loop, it is preferable to store the result of a value used in a phi-node in the loop header to be stored in the same location as that phi-node's target. Doing that will eliminate extra moves that are generated to resolve differences between edges. Change-Id: I0cb5fbe8915d602ac9b9a2a7e8b95cf47b1efb68 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* | V4 JIT: teach regalloc about callee-saved registers.Erik Verbruggen2014-06-172-9/+26
| | | | | | | | | | | | | | | | Callee-saved registers won't get clobbered by a call, so any value stored in it will survive the call. Change-Id: I2b61b84617b01bf7ce7e81cd0119a6da689ee9d5 Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
* | V4 JIT: use RegisterInfo in the register allocator.Erik Verbruggen2014-06-134-54/+46
| | | | | | | | | | Change-Id: Ia9faeb20b360f41d00f908132fd306e2d25c7574 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* | V4 RegAlloc: simplify algorithm after introducing half open ranges.Erik Verbruggen2014-06-132-125/+148
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that all ranges are half open, and temporaries are defined at the end of the (defining) statement, the linear scan algorithm get simpler. Specifically, when allocating a register for a temporary, the check if the temporary is defined or used is not needed anymore. Another simplification is the handling of phi-nodes. Previously they shared the same statement number as the first "real" statement in a basic-block, and special checks were needed to handle them. Those are now gone too. Change-Id: Ia4266ea5ede8c2aff0e70c6579fba9575c6719fb Sanity-Review: Qt Sanity Bot <qt_sanitybot@qt-project.org> Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* | V4 RegAlloc: change life-time intervals from closed to half-open.Erik Verbruggen2014-06-132-184/+215
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two changes in this patch, that go hand-in-hand. First, when re-numbering the statements in order of occurrence in the scheduled basic-blocks, the (new) position is not stored in the statement itself, but in the LifeTimeIntervals class. This makes it possible to re-use information gathered during SSA formation or optimization. The re-numbering itself has also changed, resulting in some minor changes to the life-time interval calculation. The new numbering is described in LifeTimeIntervals::renumber(). The reason is to make it easy for the register allocator and stack-slot allocator to distinguish between definition of a temporary and its uses. Example: 20: %3 = %2 + %1 22: print(%3) If the life-time of %2 or %1 ends at 20, then at the point that %3 gets assigned, it can re-use the storage occupied by %1 or %2. Also, when both %1 and %2 need to get a register assigned (because they were spilled to the stack, for example), %3 should be allocated "after" both %1 and %2. So, instead of having a closed interval of [20-22] for %3, we want to use an open interval of (20-22]. To simulate the "open" part, the life-time of %3 is set to [21-22]. So, all statements live on even positions, and temporaries defined by a statement start at statmentPosition + 1. Change-Id: I0eda2c653b0edf1a529bd0762d338b0ea9a66aa0 Sanity-Review: Qt Sanity Bot <qt_sanitybot@qt-project.org> Reviewed-by: Lars Knoll <lars.knoll@digia.com>
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