From 5efc7ae82b36da3a96bd4a1ea8ccb8fa90c6884c Mon Sep 17 00:00:00 2001 From: Erik Verbruggen Date: Fri, 31 Jan 2014 12:30:13 +0100 Subject: V4 JIT: move registers for regalloc out of method. This is a clean-up: by moving the description of the registers available for allocation out of the run method, the method gets easier to read, and the lists are easier to extend when adding more platforms. Change-Id: I840a15cda0e02488b7e038aa23cedd23508ed736 Reviewed-by: Lars Knoll --- src/qml/compiler/qv4isel_masm.cpp | 62 ++++++++++++++++++++++++--------------- src/qml/compiler/qv4regalloc_p.h | 4 +-- 2 files changed, 40 insertions(+), 26 deletions(-) diff --git a/src/qml/compiler/qv4isel_masm.cpp b/src/qml/compiler/qv4isel_masm.cpp index c89b108309..0289abd50f 100644 --- a/src/qml/compiler/qv4isel_masm.cpp +++ b/src/qml/compiler/qv4isel_masm.cpp @@ -555,6 +555,41 @@ InstructionSelection::~InstructionSelection() delete _as; } +#if (CPU(X86_64) && (OS(MAC_OS_X) || OS(LINUX))) || (CPU(X86) && OS(LINUX)) +# define REGALLOC_IS_SUPPORTED +static QVector getIntRegisters() +{ +# if CPU(X86) && OS(LINUX) // x86 with linux + static const QVector intRegisters = QVector() + << JSC::X86Registers::edx + << JSC::X86Registers::ebx; +# else // x86_64 with linux or with macos + static const QVector intRegisters = QVector() + << JSC::X86Registers::edi + << JSC::X86Registers::esi + << JSC::X86Registers::edx + << JSC::X86Registers::r9 + << JSC::X86Registers::r8 + << JSC::X86Registers::r13 + << JSC::X86Registers::r15; +# endif + return intRegisters; +} + +static QVector getFpRegisters() +{ +// linux/x86_64, linux/x86, and macos/x86_64: + static const QVector fpRegisters = QVector() + << JSC::X86Registers::xmm2 + << JSC::X86Registers::xmm3 + << JSC::X86Registers::xmm4 + << JSC::X86Registers::xmm5 + << JSC::X86Registers::xmm6 + << JSC::X86Registers::xmm7; + return fpRegisters; +} +#endif + void InstructionSelection::run(int functionIndex) { V4IR::Function *function = irModule->functions[functionIndex]; @@ -564,33 +599,12 @@ void InstructionSelection::run(int functionIndex) V4IR::Optimizer opt(_function); opt.run(qmlEngine); -#if (CPU(X86_64) && (OS(MAC_OS_X) || OS(LINUX))) || (CPU(X86) && OS(LINUX)) +#ifdef REGALLOC_IS_SUPPORTED static const bool withRegisterAllocator = qgetenv("QV4_NO_REGALLOC").isEmpty(); if (opt.isInSSA() && withRegisterAllocator) { -#if CPU(X86) && OS(LINUX) // x86 with linux - static const QVector intRegisters = QVector() - << JSC::X86Registers::edx - << JSC::X86Registers::ebx; -#else // x86_64 with linux or with macos - static const QVector intRegisters = QVector() - << JSC::X86Registers::edi - << JSC::X86Registers::esi - << JSC::X86Registers::edx - << JSC::X86Registers::r9 - << JSC::X86Registers::r8 - << JSC::X86Registers::r13 - << JSC::X86Registers::r15; -#endif - static const QVector fpRegisters = QVector() - << JSC::X86Registers::xmm2 - << JSC::X86Registers::xmm3 - << JSC::X86Registers::xmm4 - << JSC::X86Registers::xmm5 - << JSC::X86Registers::xmm6 - << JSC::X86Registers::xmm7; - RegisterAllocator(intRegisters, fpRegisters).run(_function, opt); + RegisterAllocator(getIntRegisters(), getFpRegisters()).run(_function, opt); } else -#endif +#endif // REGALLOC_IS_SUPPORTED { if (opt.isInSSA()) // No register allocator available for this platform, or env. var was set, so: diff --git a/src/qml/compiler/qv4regalloc_p.h b/src/qml/compiler/qv4regalloc_p.h index 53d09f6252..c6dfa9f11a 100644 --- a/src/qml/compiler/qv4regalloc_p.h +++ b/src/qml/compiler/qv4regalloc_p.h @@ -58,8 +58,8 @@ class RegisterAllocator { typedef V4IR::LifeTimeInterval LifeTimeInterval; - const QVector &_normalRegisters; - const QVector &_fpRegisters; + QVector _normalRegisters; + QVector _fpRegisters; QScopedPointer _info; QVector _fixedRegisterRanges, _fixedFPRegisterRanges; -- cgit v1.2.3