From 4e6bd8456fb5b20239f7a2a8597edfa05dfc6071 Mon Sep 17 00:00:00 2001
From: Erik Verbruggen <erik.verbruggen@qt.io>
Date: Wed, 15 Feb 2017 15:21:21 +0100
Subject: V4 JIT: Store the NaNEncodeMask in a register on 64bit

When a callee saved register is available on 64bit platforms, put the
Value::NaNEncodeMask in it. This saves one instruction for every load
or store of doubles.

Change-Id: I57262988610996e6a912e97d3026d4bb8ce26fe8
Reviewed-by: Simon Hausmann <simon.hausmann@qt.io>
Reviewed-by: Qt CI Bot <qt_ci_bot@qt-project.org>
---
 src/qml/jit/qv4assembler.cpp | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/qml/jit/qv4assembler.cpp')

diff --git a/src/qml/jit/qv4assembler.cpp b/src/qml/jit/qv4assembler.cpp
index a2cb56abbe..ad8a5823e2 100644
--- a/src/qml/jit/qv4assembler.cpp
+++ b/src/qml/jit/qv4assembler.cpp
@@ -356,6 +356,8 @@ void Assembler<TargetConfiguration>::enterStandardStackFrame(const RegisterInfor
         slotAddr.offset -= RegisterSize;
         storePtr(regularRegistersToSave.at(i).reg<RegisterID>(), slotAddr);
     }
+
+    platformFinishEnteringStandardStackFrame(this);
 }
 
 template <typename TargetConfiguration>
-- 
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