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| author | Chenxi Mao <parheliamm@126.com> | 2020-04-10 08:46:18 +0800 |
|---|---|---|
| committer | Martin Jansa <Martin.Jansa@gmail.com> | 2021-01-22 12:00:00 +0100 |
| commit | cad441b37681ec1c23ccf20e7cbeffdc9d7ba808 (patch) | |
| tree | 789d68294ac1f23054f5062a41b05474ae257cf4 /recipes-qt/qt5/qtwebengine/chromium/0005-chromium-Do-not-try-to-set-the-guessed-values-for-ma.patch | |
| parent | 31c137e51ff98c58a381d3c6eacddda5c10f11e1 (diff) | |
QTWebkit: Support RISC-V ISA on QTwebkit
There are 3 changes to support RISC-V
1. Add a patch to support RISC-V CPU
2. Disable JIT as mips/ppc did
Diffstat (limited to 'recipes-qt/qt5/qtwebengine/chromium/0005-chromium-Do-not-try-to-set-the-guessed-values-for-ma.patch')
0 files changed, 0 insertions, 0 deletions