QTWebkit: Support RISC-V ISA on QTwebkit

There are 3 changes to support RISC-V
1. Add a patch to support RISC-V CPU
2. Disable JIT as mips/ppc did

Change-Id: I612428194c98acf0f18cec180816caa4e32ece2a
Reviewed-by: Chenxi Mao <chenxi.mao2013@gmail.com>
Reviewed-by: Konstantin Tokarev <annulen@yandex.ru>

2 files changed, 87 insertions, 1 deletions

diff --git a/recipes-qt/qt5/qtwebkit/0005-Riscv-Add-support-for-riscv.patch b/recipes-qt/qt5/qtwebkit/0005-Riscv-Add-support-for-riscv.patch
new file mode 100644
index 00000000..2bfb72fe
--- /dev/null
+++ b/recipes-qt/qt5/qtwebkit/0005-Riscv-Add-support-for-riscv.patch
@@ -0,0 +1,83 @@
+From b5a58d2c001689b07591fdce8820773d57a74002 Mon Sep 17 00:00:00 2001
+From: Chenxi Mao <chenxi.mao2013@gmail.com>
+Date: Fri, 3 Apr 2020 08:33:10 +0800
+Subject: [PATCH 1/1] Riscv: Add support for riscv
+
+---
+ CMakeLists.txt                       |  2 ++
+ Source/JavaScriptCore/CMakeLists.txt |  1 +
+ Source/WTF/wtf/Platform.h            | 12 ++++++++++--
+ Source/WTF/wtf/dtoa/utils.h          |  2 +-
+ 4 files changed, 14 insertions(+), 3 deletions(-)
+
+diff --git a/CMakeLists.txt b/CMakeLists.txt
+index 31a2ea1fd..516476729 100644
+--- a/CMakeLists.txt
++++ b/CMakeLists.txt
+@@ -83,6 +83,8 @@ elseif (LOWERCASE_CMAKE_SYSTEM_PROCESSOR MATCHES "s390")
+     set(WTF_CPU_S390 1)
+ elseif (LOWERCASE_CMAKE_SYSTEM_PROCESSOR MATCHES "s390x")
+     set(WTF_CPU_S390X 1)
++elseif (LOWERCASE_CMAKE_SYSTEM_PROCESSOR MATCHES "riscv64")
++    set(WTF_CPU_RISCV64 1)
+ else ()
+     message(FATAL_ERROR "Unknown CPU '${LOWERCASE_CMAKE_SYSTEM_PROCESSOR}'")
+ endif ()
+diff --git a/Source/JavaScriptCore/CMakeLists.txt b/Source/JavaScriptCore/CMakeLists.txt
+index 937b3ed00..2fff29f9d 100644
+--- a/Source/JavaScriptCore/CMakeLists.txt
++++ b/Source/JavaScriptCore/CMakeLists.txt
+@@ -1286,6 +1286,7 @@ elseif (WTF_CPU_S390)
+ elseif (WTF_CPU_S390X)
+ elseif (WTF_CPU_MIPS)
+ elseif (WTF_CPU_SH4)
++elseif (WTF_CPU_RISCV64)
+ elseif (WTF_CPU_X86)
+ elseif (WTF_CPU_X86_64)
+     if (MSVC AND ENABLE_JIT)
+diff --git a/Source/WTF/wtf/Platform.h b/Source/WTF/wtf/Platform.h
+index 5717f3ea1..8fac85f72 100644
+--- a/Source/WTF/wtf/Platform.h
++++ b/Source/WTF/wtf/Platform.h
+@@ -349,7 +349,14 @@
+ 
+ #endif /* ARM */
+ 
+-#if CPU(ARM) || CPU(MIPS) || CPU(SH4) || CPU(ALPHA) || CPU(HPPA)
++#if defined(__riscv)
++#define WTF_CPU_RISCV 1
++#if __riscv_xlen == 64
++#define WTF_CPU_RISCV64 1
++#endif
++#endif
++
++#if CPU(ARM) || CPU(MIPS) || CPU(SH4) || CPU(ALPHA) || CPU(HPPA) || CPU(RISCV)
+ #define WTF_CPU_NEEDS_ALIGNED_ACCESS 1
+ #endif
+ 
+@@ -707,7 +714,8 @@
+     || CPU(S390X) \
+     || CPU(MIPS64) \
+     || CPU(PPC64) \
+-    || CPU(PPC64LE)
++    || CPU(PPC64LE) \
++    || CPU(RISCV64)
+ #define USE_JSVALUE64 1
+ #else
+ #define USE_JSVALUE32_64 1
+diff --git a/Source/WTF/wtf/dtoa/utils.h b/Source/WTF/wtf/dtoa/utils.h
+index 05302e6e6..25dd352ee 100644
+--- a/Source/WTF/wtf/dtoa/utils.h
++++ b/Source/WTF/wtf/dtoa/utils.h
+@@ -49,7 +49,7 @@
+ defined(__ARMEL__) || \
+ defined(_MIPS_ARCH_MIPS32R2)
+ #define DOUBLE_CONVERSION_CORRECT_DOUBLE_OPERATIONS 1
+-#elif CPU(MIPS) || CPU(MIPS64) || CPU(PPC) || CPU(PPC64) || CPU(PPC64LE) || CPU(SH4) || CPU(S390) || CPU(S390X) || CPU(IA64) || CPU(ALPHA) || CPU(ARM64) || CPU(HPPA) || CPU(ARM)
++#elif CPU(MIPS) || CPU(MIPS64) || CPU(PPC) || CPU(PPC64) || CPU(PPC64LE) || CPU(SH4) || CPU(S390) || CPU(S390X) || CPU(IA64) || CPU(ALPHA) || CPU(ARM64) || CPU(HPPA) || CPU(ARM) || CPU(RISCV)
+ #define DOUBLE_CONVERSION_CORRECT_DOUBLE_OPERATIONS 1
+ #elif defined(_M_IX86) || defined(__i386__)
+ #if defined(_WIN32)
+-- 
+2.17.1
+
diff --git a/recipes-qt/qt5/qtwebkit_git.bb b/recipes-qt/qt5/qtwebkit_git.bb
index 675eeb6f..8fd2aee8 100644
--- a/recipes-qt/qt5/qtwebkit_git.bb
+++ b/recipes-qt/qt5/qtwebkit_git.bb
@@ -16,6 +16,7 @@ SRC_URI += "\
     file://0002-Fix-build-with-non-glibc-libc-on-musl.patch \
     file://0003-Fix-build-bug-for-armv32-BE.patch \
     file://0004-PlatformQt.cmake-Do-not-generate-hardcoded-include-p.patch \
+    file://0005-Riscv-Add-support-for-riscv.patch \
 "
 
 inherit cmake_qt5 perlnative
@@ -52,9 +53,11 @@ EXTRA_OECMAKE += " \
 
 EXTRA_OECMAKE_append_toolchain-clang = " -DCMAKE_CXX_IMPLICIT_INCLUDE_DIRECTORIES:PATH='${STAGING_INCDIR}'"
 
-# JIT not supported on MIPS/PPC
+# JIT not supported on MIPS/PPC/RISCV
 EXTRA_OECMAKE_append_mipsarch = " -DENABLE_JIT=OFF -DENABLE_C_LOOP=ON "
 EXTRA_OECMAKE_append_powerpc = " -DENABLE_JIT=OFF -DENABLE_C_LOOP=ON "
+EXTRA_OECMAKE_append_riscv64 = " -DENABLE_JIT=OFF -DENABLE_C_LOOP=ON "
+
 # Disable gold on mips64/clang
 # mips64-yoe-linux-musl-ld.gold: internal error in get_got_page_offset, at ../../gold/mips.cc:6260
 # mips-yoe-linux-musl-ld.gold: error: Can't find matching LO16 reloc