| Commit message (Expand) | Author | Age | Files | Lines |
* | [mips] Add instruction aliases for ds(r|l)l. | Simon Dardis | 2017-06-27 | 1 | -0/+4 |
* | [mips] Correct c.cond.fmt instruction definition. | Simon Dardis | 2017-01-16 | 2 | -32/+32 |
* | [mips] seb, seh instruction aliases | Simon Dardis | 2016-11-22 | 1 | -2/+4 |
* | [mips] not instruction alias | Simon Dardis | 2016-11-16 | 1 | -0/+2 |
* | Recommit: "[mips] Add rsqrt, recip for MIPS" | Simon Dardis | 2016-10-05 | 2 | -4/+4 |
* | Revert "[mips] Add rsqrt, recip for MIPS" | Simon Dardis | 2016-10-05 | 2 | -4/+4 |
* | [mips] Add rsqrt, recip for MIPS | Simon Dardis | 2016-09-27 | 2 | -4/+4 |
* | Revert "[mips] Fix c.<cc>.<fmt> instruction definition." | Simon Dardis | 2016-09-09 | 2 | -32/+32 |
* | [mips] Fix c.<cc>.<fmt> instruction definition. | Simon Dardis | 2016-09-09 | 2 | -32/+32 |
* | [mips] Add l.[sd] and s.[sd] instruction aliases | Simon Dardis | 2016-08-17 | 1 | -0/+4 |
* | [mips] sgtu, s[rl]l, sra, dnegu, neg instruction aliases | Simon Dardis | 2016-07-26 | 1 | -0/+9 |
* | [mips] Correct label prefixes for N32 and N64. | Daniel Sanders | 2016-07-19 | 1 | -2/+2 |
* | [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2... | Zlatko Buljan | 2016-07-11 | 1 | -0/+46 |
* | [mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instruct... | Hrvoje Varga | 2016-06-27 | 1 | -0/+1 |
* | [mips] Don't derive the default ABI from the CPU in the backend. | Daniel Sanders | 2016-06-23 | 2 | -3/+3 |
* | [mips] Weaken asm predicate for memory offsets | Simon Dardis | 2016-05-27 | 1 | -0/+31 |
* | Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions" | Hrvoje Varga | 2016-05-12 | 1 | -6/+4 |
* | [mips][microMIPS] Implement CFC*, CTC* and LDC* instructions | Hrvoje Varga | 2016-05-11 | 1 | -4/+6 |
* | [mips][microMIPS] Revert commit r266861. | Zoran Jovanovic | 2016-04-22 | 1 | -6/+4 |
* | [mips][microMIPS]Implement CFC*, CTC* and LDC* instructions | Hrvoje Varga | 2016-04-20 | 1 | -4/+6 |
* | [mips] Invalid tests for MTC0, MTC2, MFC0, MFC2, DMTC0, DMFC0 MIPS instructions | Hrvoje Varga | 2016-03-11 | 1 | -0/+4 |
* | [mips] Range check uimm20 and fixed a bug this revealed. | Daniel Sanders | 2016-02-29 | 1 | -0/+2 |
* | [mips] added support for trunc macro | Zoran Jovanovic | 2016-02-22 | 1 | -4/+6 |
* | [mips] Never select JAL for calls to an absolute immediate address. | Daniel Sanders | 2016-01-11 | 1 | -0/+1 |
* | [mips][ias] Removed DSP/DSPr2 instructions from base architecture valid-xfail... | Daniel Sanders | 2015-12-07 | 1 | -131/+8 |
* | [mips][ias] Removed MSA instructions from base architecture valid-xfail.s's. | Daniel Sanders | 2015-11-30 | 1 | -55/+0 |
* | [mips][ias] Range check uimm5 operands and fix several bugs this revealed. | Daniel Sanders | 2015-11-26 | 1 | -3/+9 |
* | [mips] Added support for various EVA ASE instructions. | Daniel Sanders | 2015-09-15 | 1 | -1/+1 |
* | [mips] Remap move as or. | Vasileios Kalintiris | 2015-08-11 | 1 | -4/+4 |
* | [mips] Added support for the ERETNC instruction. | Vasileios Kalintiris | 2015-07-20 | 4 | -0/+25 |
* | [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0. | Daniel Sanders | 2015-06-27 | 1 | -2/+4 |
* | [mips][msa] Test basic operations for the N32 ABI too. | Daniel Sanders | 2015-05-05 | 1 | -0/+3 |
* | [mips] [IAS] Remove AssemblerPredicate's from RelocPIC and RelocStatic. | Toma Tabacu | 2015-04-08 | 1 | -1/+8 |
* | [mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction. | Toma Tabacu | 2015-03-17 | 1 | -0/+1 |
* | [MIPS]Multiple and add instructions for Mips are currently available in mips3... | Vladimir Medic | 2015-02-25 | 1 | -4/+0 |
* | [mips] Add backend support for Mips32r[35] and Mips64r[35]. | Daniel Sanders | 2015-02-18 | 5 | -0/+666 |