diff options
Diffstat (limited to 'src/3rdparty/v8/src/arm/constants-arm.h')
| -rw-r--r-- | src/3rdparty/v8/src/arm/constants-arm.h | 37 |
1 files changed, 24 insertions, 13 deletions
diff --git a/src/3rdparty/v8/src/arm/constants-arm.h b/src/3rdparty/v8/src/arm/constants-arm.h index e767001..03876f9 100644 --- a/src/3rdparty/v8/src/arm/constants-arm.h +++ b/src/3rdparty/v8/src/arm/constants-arm.h @@ -29,14 +29,14 @@ #define V8_ARM_CONSTANTS_ARM_H_ // ARM EABI is required. -#if defined(__arm__) && !defined(__ARM_EABI__) +#if defined(__arm__) && !defined(__ARM_EABI__) && !defined(_WIN32_WCE) #error ARM EABI support is required. #endif // This means that interwork-compatible jump instructions are generated. We // want to generate them on the simulator too so it makes snapshots that can // be used on real hardware. -#if defined(__THUMB_INTERWORK__) || !defined(__arm__) +#if defined(__THUMB_INTERWORK__) || !defined(__arm__) || defined(_WIN32_WCE) # define USE_THUMB_INTERWORK 1 #endif @@ -56,16 +56,19 @@ # define CAN_USE_ARMV6_INSTRUCTIONS 1 #endif -#if defined(__ARM_ARCH_5T__) || \ - defined(__ARM_ARCH_5TE__) || \ +#if defined(__ARM_ARCH_5T__) || \ + defined(__ARM_ARCH_5TE__) || \ + defined(__ARM_ARCH_5TEJ__) || \ defined(CAN_USE_ARMV6_INSTRUCTIONS) # define CAN_USE_ARMV5_INSTRUCTIONS 1 # define CAN_USE_THUMB_INSTRUCTIONS 1 #endif // Simulator should support ARM5 instructions and unaligned access by default. -#if !defined(__arm__) -# define CAN_USE_ARMV5_INSTRUCTIONS 1 +#if !defined(__arm__) || defined(_WIN32_WCE) +# if !defined(_WIN32_WCE) +# define CAN_USE_ARMV5_INSTRUCTIONS 1 +# endif # define CAN_USE_THUMB_INSTRUCTIONS 1 # ifndef CAN_USE_UNALIGNED_ACCESSES @@ -74,10 +77,6 @@ #endif -#if CAN_USE_UNALIGNED_ACCESSES -#define V8_TARGET_CAN_READ_UNALIGNED 1 -#endif - // Using blx may yield better code, so use it when required or when available #if defined(USE_THUMB_INTERWORK) || defined(CAN_USE_ARMV5_INSTRUCTIONS) #define USE_BLX 1 @@ -87,9 +86,18 @@ namespace v8 { namespace internal { // Constant pool marker. -const int kConstantPoolMarkerMask = 0xffe00000; -const int kConstantPoolMarker = 0x0c000000; -const int kConstantPoolLengthMask = 0x001ffff; +// Use UDF, the permanently undefined instruction. +const int kConstantPoolMarkerMask = 0xfff000f0; +const int kConstantPoolMarker = 0xe7f000f0; +const int kConstantPoolLengthMaxMask = 0xffff; +inline int EncodeConstantPoolLength(int length) { + ASSERT((length & kConstantPoolLengthMaxMask) == length); + return ((length & 0xfff0) << 4) | (length & 0xf); +} +inline int DecodeConstantPoolLength(int instr) { + ASSERT((instr & kConstantPoolMarkerMask) == kConstantPoolMarker); + return ((instr >> 4) & 0xfff0) | (instr & 0xf); +} // Number of registers in normal ARM mode. const int kNumRegisters = 16; @@ -690,6 +698,9 @@ class Instruction { && (Bit(20) == 0) && ((Bit(7) == 0)); } + // Test for a nop instruction, which falls under type 1. + inline bool IsNopType1() const { return Bits(24, 0) == 0x0120F000; } + // Test for a stop instruction. inline bool IsStop() const { return (TypeValue() == 7) && (Bit(24) == 1) && (SvcValue() >= kStopCode); |