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author | Yi Kong <Yi.Kong@arm.com> | 2014-07-23 19:55:09 +0000 |
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committer | Yi Kong <Yi.Kong@arm.com> | 2014-07-23 19:55:09 +0000 |
commit | 950ec566ee8f1b5df4462f96c02d4d689ff630df (patch) | |
tree | 2a9aca13ce80f3cb8b30d2a240ae46595d49ef92 | |
parent | e9c406347d554df3f43bfd964c08aa888641e525 (diff) |
Merging r213733:
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r213733 | kongyi | 2014-07-23 10:25:02 +0100 (Wed, 23 Jul 2014) | 5 lines
ARM: Add doc for ACLE memory barrier intrinsics
Add documentations for ACLE memory barrier intrinsics, describing their motion
barrier characteristics.
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git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_35@213787 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | docs/LanguageExtensions.rst | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/docs/LanguageExtensions.rst b/docs/LanguageExtensions.rst index 4c600868e9..50e1ccebe8 100644 --- a/docs/LanguageExtensions.rst +++ b/docs/LanguageExtensions.rst @@ -1634,6 +1634,19 @@ Target-Specific Extensions Clang supports some language features conditionally on some targets. +ARM/AArch64 Language Extensions +------------------------------- + +Memory Barrier Intrinsics +^^^^^^^^^^^^^^^^^^^^^^^^^ +Clang implements the ``__dmb``, ``__dsb`` and ``__isb`` intrinsics as defined +in the `ARM C Language Extensions Release 2.0 +<http://infocenter.arm.com/help/topic/com.arm.doc.ihi0053c/IHI0053C_acle_2_0.pdf>`_. +Note that these intrinsics are implemented as motion barriers that block +reordering of memory accesses and side effect instructions. Other instructions +like simple arithmatic may be reordered around the intrinsic. If you expect to +have no reordering at all, use inline assembly instead. + X86/X86-64 Language Extensions ------------------------------ |