| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Revert r319777 for PR36357 | Hans Wennborg | 2018-02-14 | 2 | -3/+5 |
| * | [DOXYGEN] Fix doxygen and content issues in smmintrin.h | Douglas Yung | 2018-01-02 | 1 | -3/+3 |
| * | [DOXYGEN] Fix doxygen and content issues in pmmintrin.h | Douglas Yung | 2018-01-02 | 1 | -3/+3 |
| * | [DOXYGEN] Fix doxygen and content issues in emmintrin.h | Douglas Yung | 2018-01-02 | 1 | -48/+63 |
| * | [x86][icelake][vbmi2] | Coby Tayree | 2017-12-27 | 4 | -0/+1150 |
| * | [x86][icelake][vnni] | Coby Tayree | 2017-12-27 | 4 | -0/+411 |
| * | [x86][icelake][bitalg] | Coby Tayree | 2017-12-27 | 4 | -0/+265 |
| * | [x86][icelake][vpclmulqdq] | Coby Tayree | 2017-12-27 | 3 | -0/+47 |
| * | [x86][icelake][gfni] | Coby Tayree | 2017-12-27 | 3 | -0/+207 |
| * | [x86][icelake][vaes] | Coby Tayree | 2017-12-27 | 3 | -0/+103 |
| * | [CUDA] More fixes for __shfl_* intrinsics. | Artem Belevich | 2017-12-21 | 1 | -28/+49 |
| * | [X86] Allow _mm_prefetch (both the header implementation and the builtin) to ... | Craig Topper | 2017-12-21 | 1 | -4/+7 |
| * | [X86] Add more CPUID bits to cpuid.h to match gcc and support icelake features. | Craig Topper | 2017-12-20 | 1 | -5/+14 |
| * | [X86] Add the two files I forgot to commit in r320915. | Craig Topper | 2017-12-16 | 1 | -0/+99 |
| * | [X86] Add builtins and tests for 128 and 256 bit vpopcntdq. | Craig Topper | 2017-12-16 | 2 | -0/+6 |
| * | In stdbool.h, define bool, false, true only in gnu++98 | Stephan Bergmann | 2017-12-08 | 1 | -1/+4 |
| * | [NVPTX,CUDA] Added llvm.nvvm.fns intrinsic and matching __nvvm_fns builtin in... | Artem Belevich | 2017-12-06 | 1 | -0/+4 |
| * | [CUDA] Added overloads for '[unsigned] long' variants of shfl builtins. | Artem Belevich | 2017-12-06 | 1 | -0/+18 |
| * | [x86][AVX512] Lowering kunpack intrinsics to LLVM IR | Jina Nahias | 2017-12-05 | 2 | -5/+3 |
| * | [clang] Use add_llvm_install_targets | Shoaib Meenai | 2017-11-30 | 1 | -5/+3 |
| * | [CUDA] Tweak CUDA wrappers to make cuda-9 work with libc++ | Artem Belevich | 2017-11-30 | 1 | -0/+6 |
| * | [OpenCL] Add extensions cl_intel_subgroups and cl_intel_subgroups_short | Alexey Sotkin | 2017-11-27 | 1 | -0/+307 |
| * | Control-Flow Enforcement Technology - Shadow Stack and Indirect Branch Tracki... | Oren Ben Simhon | 2017-11-26 | 3 | -0/+98 |
| * | [X86] Use separate builtins for fma4 scalar intrinsics. Use negations to remo... | Craig Topper | 2017-11-25 | 2 | -14/+14 |
| * | [CUDA] Remove implementations of nexttoward. | Justin Lebar | 2017-11-17 | 2 | -23/+8 |
| * | [X86] test/testn intrinsics lowering to IR. clang side | Uriel Korach | 2017-11-13 | 4 | -162/+128 |
| * | [x86][AVX512] Lowering shuffle i/f intrinsics to LLVM IR | Jina Nahias | 2017-11-13 | 2 | -105/+125 |
| * | [CUDA] Fix std::min on device side to return the min, not the max. | Justin Lebar | 2017-11-11 | 1 | -1/+1 |
| * | [X86] Reduce the number of FMA builtins needed by the frontend by adding nega... | Craig Topper | 2017-11-10 | 2 | -32/+32 |
| * | [X86] Rename the VEX scalar fma builtins to end with a '3' to match gcc | Craig Topper | 2017-11-09 | 2 | -16/+16 |
| * | [X86] Replace the mask cmpeq/cmple/cmplt/cmpgt/cmpge/cmpneq intrinsics with m... | Craig Topper | 2017-11-06 | 4 | -1821/+692 |
| * | lowering broadcastm | Jina Nahias | 2017-11-06 | 2 | -7/+8 |
| * | [Headers] Fix typoed __ARM_DWARF_EH__ ifdefs | Martin Storsjo | 2017-10-19 | 1 | -3/+3 |
| * | [X86] Add CLWB intrinsic. clang part | Craig Topper | 2017-10-12 | 3 | -0/+57 |
| * | [X86] Correct type for argument to clflushopt intrinsic. | Craig Topper | 2017-10-11 | 1 | -1/+1 |
| * | [CUDA] Fix name of __activemask() | Jonas Hahnfeld | 2017-10-02 | 1 | -1/+1 |
| * | [CUDA] Work around conflicting function definitions in CUDA-9 headers. | Artem Belevich | 2017-09-27 | 1 | -0/+11 |
| * | [NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins. | Artem Belevich | 2017-09-26 | 1 | -3/+29 |
| * | Revert "[NVPTX] added match.{any,all}.sync instructions, intrinsics & builtin... | Justin Lebar | 2017-09-25 | 1 | -29/+3 |
| * | [NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins. | Artem Belevich | 2017-09-25 | 1 | -3/+29 |
| * | [CUDA] Fix names of __nvvm_vote* intrinsics. | Artem Belevich | 2017-09-25 | 1 | -5/+5 |
| * | fixing a bug in mask[z]_set1 intrinsic | Jina Nahias | 2017-09-25 | 1 | -2/+2 |
| * | [CUDA] Fixed order of words in the names of shfl builtins. | Artem Belevich | 2017-09-21 | 1 | -4/+3 |
| * | [NVPTX] Implemented bar.warp.sync, barrier.sync, and vote{.sync} instructions... | Artem Belevich | 2017-09-21 | 1 | -0/+31 |
| * | [NVPTX] Implemented shfl.sync instruction and supporting intrinsics/builtins. | Artem Belevich | 2017-09-20 | 1 | -0/+68 |
| * | Lowering Mask Set1 intrinsics to LLVM IR | Jina Nahias | 2017-09-19 | 4 | -90/+101 |
| * | [X86] Disable _mm512_maskz_set1_epi64 intrinsic on 32-bit targets to prevent ... | Craig Topper | 2017-09-15 | 1 | -7/+2 |
| * | [CUDA] Work around a new quirk in CUDA9 headers. | Artem Belevich | 2017-09-15 | 1 | -0/+10 |
| * | [Headers] Fix the return type of _InterlockedCompareExchange_rel | Martin Storsjo | 2017-09-14 | 1 | -1/+1 |
| * | This adds the _Float16 preprocessor macro definitions. | Sjoerd Meijer | 2017-09-13 | 1 | -0/+14 |
