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path: root/llvm/lib/Target/X86/X86TargetMachine.cpp
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* [X86] Add an Unoptimized Load Value Injection (LVI) Load Hardening PassScott Constable2020-06-241-1/+4
* [X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) G...Scott Constable2020-06-241-0/+2
* Revert "[X86] Add a Pass that builds a Condensed CFG for Load Value Injection...Craig Topper2020-06-241-2/+0
* [X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) G...Scott Constable2020-06-241-0/+2
* [X86] Add RET-hardening Support to mitigate Load Value Injection (LVI)Scott Constable2020-06-241-0/+2
* [X86][NFC] Generalize the naming of "Retpoline Thunks" and related code to "I...Scott Constable2020-06-241-1/+1
* Enable IBT(Indirect Branch Tracking) in JIT with CET(Control-flow Enforcement...Xiang1 Zhang2020-05-181-1/+1
* CMake: Make most target symbols hidden by defaultTom Stellard2020-01-141-1/+1
* [X86] Fix -enable-machine-outliner for x86-32 after D48683Fangrui Song2019-12-281-3/+1
* Revert "Honor -fuse-init-array when os is not specified on x86"Mitch Phillips2019-12-171-1/+11
* Honor -fuse-init-array when os is not specified on x86Kamlesh Kumar2019-12-161-11/+1
* Add Windows Control Flow Guard checks (/guard:cf).Andrew Paverd2019-10-281-0/+14
* [Alignment][NFC] Use Align for TargetFrameLowering/SubtargetGuillaume Chatelet2019-10-171-4/+4
* Add AutoUpgrade function to add new address space datalayout string to existi...Amy Huang2019-09-181-13/+3
* Reland "Change the X86 datalayout to add three address spacesAmy Huang2019-09-101-2/+15
* [Windows] Replace TrapUnreachable with an int3 insertion passReid Kleckner2019-09-091-11/+10
* Revert [Windows] Disable TrapUnreachable for Win64, add SEH_NoReturnReid Kleckner2019-09-031-1/+9
* [Windows] Disable TrapUnreachable for Win64, add SEH_NoReturnReid Kleckner2019-08-301-9/+1
* Revert "Change the X86 datalayout to add three address spaces for 32 bit sign...Vlad Tsyrklevich2019-08-281-3/+0
* Change the X86 datalayout to add three address spaces for 32 bit signed,Amy Huang2019-08-271-0/+3
* [X86] Making X86OptimizeLEAs pass public. NFCPengfei Wang2019-08-221-0/+1
* [llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere2019-08-151-9/+9
* X86: Clean up pass initializationTom Stellard2019-06-131-0/+1
* Revert CMake: Make most target symbols hidden by defaultTom Stellard2019-06-111-1/+1
* CMake: Make most target symbols hidden by defaultTom Stellard2019-06-101-1/+1
* [TargetMachine] error message unsupported code modelSjoerd Meijer2019-05-221-1/+1
* [X86] Create a TargetInfo header. NFCRichard Trieu2019-05-151-0/+1
* [X86] Run CFIInstrInserter on Windows if Dwarf is usedMartin Storsjo2019-04-291-1/+5
* [GlobalISel] Introduce a CSEConfigBase class to allow targets to define their...Amara Emerson2019-04-151-0/+6
* [X86] Preserve operand flag when expanding TCRETURNriFrancis Visoiu Mistrih2019-04-051-0/+1
* [X86] Make the post machine scheduler macrofusion-aware.Clement Courbet2019-04-031-0/+7
* Delete x86_64 ShadowCallStack supportVlad Tsyrklevich2019-03-071-2/+0
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [X86] Initialize and Register X86CondBrFoldingPassCraig Topper2018-12-071-0/+1
* [Targets] Add errors for tiny and kernel codemodel on targets that don't supp...David Green2018-12-071-4/+8
* Revert "Revert r347596 "Support for inserting profile-directed cache prefetch...Mircea Trofin2018-11-301-0/+2
* Revert r347596 "Support for inserting profile-directed cache prefetches"Hans Wennborg2018-11-291-2/+0
* Support for inserting profile-directed cache prefetchesMircea Trofin2018-11-261-0/+2
* [X86] Disable Condbr_merge passRong Xu2018-11-161-1/+1
* X86: Consistently declare pass initializers in X86.h; NFCMatthias Braun2018-11-011-15/+0
* [X86] Change X86 backend to look for 'min-legal-vector-width' attribute inste...Craig Topper2018-10-251-4/+5
* Recommit r343993: [X86] condition branches folding for three-way conditional ...Rong Xu2018-10-091-0/+7
* [X86] Revert r343993 condition branches folding for three-way conditional codesRong Xu2018-10-081-7/+0
* [X86] condition branches folding for three-way conditional codesRong Xu2018-10-081-0/+7
* [x86/SLH] Add a real Clang flag and LLVM IR attribute for SpeculativeChandler Carruth2018-09-041-7/+1
* [x86] Actually initialize the SLH pass with the x86 backend and useChandler Carruth2018-08-161-0/+2
* Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code mod...Reid Kleckner2018-07-231-1/+7
* [SLH] Introduce a new pass to do Speculative Load Hardening to mitigateChandler Carruth2018-07-131-0/+7
* Revert "Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC ...Jonas Devlieghere2018-06-281-7/+1
* [MachineOutliner] Define MachineOutliner support in TargetOptionsJessica Paquette2018-06-281-0/+4
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