| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Merging r325653 with test fixups: | Simon Dardis | 2018-04-11 | 1 | -0/+6 |
| * | [mips] Correct microMIP's jump and add unconditional branch pseudo | Simon Dardis | 2017-11-09 | 1 | -1/+3 |
| * | [mips] Guard indirect and tailcall pseudo instructions correctly. | Simon Dardis | 2017-11-08 | 1 | -0/+7 |
| * | [mips] Add movep for microMIPS32R6 and fix microMIPS32r3 version | Simon Dardis | 2017-11-06 | 1 | -0/+4 |
| * | [mips] Place certain 64 bit FPU instructions in their own decoder namespace | Simon Dardis | 2017-10-05 | 1 | -3/+3 |
| * | [mips][microMIPS] add lapc instruction | Petar Jovanovic | 2017-09-11 | 1 | -0/+3 |
| * | Reland r308585 | Stefan Maksimovic | 2017-07-20 | 1 | -4/+1 |
| * | Revert r308585 | Stefan Maksimovic | 2017-07-20 | 1 | -1/+4 |
| * | [mips] Fix fp select machine verifier errors | Stefan Maksimovic | 2017-07-20 | 1 | -4/+1 |
| * | [mips] seb, seh instruction aliases | Simon Dardis | 2016-11-22 | 1 | -0/+4 |
| * | [mips] Fix aui/daui/dahi/dati for MIPSR6 | Simon Dardis | 2016-10-14 | 1 | -1/+1 |
| * | [mips] Add IAS support for dvp, evp | Simon Dardis | 2016-10-13 | 1 | -2/+3 |
| * | Recommit: "[mips] Add rsqrt, recip for MIPS" | Simon Dardis | 2016-10-05 | 1 | -19/+0 |
| * | Revert "[mips] Add rsqrt, recip for MIPS" | Simon Dardis | 2016-10-05 | 1 | -0/+19 |
| * | [mips] Add rsqrt, recip for MIPS | Simon Dardis | 2016-09-27 | 1 | -19/+0 |
| * | Revert "[mips] Fix aui/daui/dahi/dati for MIPSR6" | Simon Dardis | 2016-09-16 | 1 | -1/+1 |
| * | [mips] Fix aui/daui/dahi/dati for MIPSR6 | Simon Dardis | 2016-09-16 | 1 | -1/+1 |
| * | [mips] interAptiv based generic schedule model | Simon Dardis | 2016-09-01 | 1 | -2/+2 |
| * | [mips] Preparatory work for a generic scheduler | Simon Dardis | 2016-08-24 | 1 | -161/+246 |
| * | [mips][microMIPS] Implement BLTZC, BLEZC, BGEZC and BGTZC instructions, fix d... | Hrvoje Varga | 2016-08-22 | 1 | -53/+87 |
| * | [mips] Correct tail call encoding for MIPSR6 | Simon Dardis | 2016-08-18 | 1 | -0/+2 |
| * | [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2... | Zlatko Buljan | 2016-07-11 | 1 | -0/+75 |
| * | [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NO... | Zlatko Buljan | 2016-06-15 | 1 | -10/+53 |
| * | [mips][microMIPS] Implement BOVC, BNVC, EXT, INS and JALRC instructions | Hrvoje Varga | 2016-06-09 | 1 | -3/+72 |
| * | [mips][microMIPS] Add CodeGen support for SEL.*, SELEQZ, SELNEZ, SELEQZ.*, SE... | Zlatko Buljan | 2016-06-09 | 1 | -42/+59 |
| * | [mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions | Zlatko Buljan | 2016-05-19 | 1 | -0/+32 |
| * | [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGe... | Zlatko Buljan | 2016-05-18 | 1 | -2/+6 |
| * | [mips][microMIPS] Implement BEQZC and BNEZC instructions | Zoran Jovanovic | 2016-05-17 | 1 | -0/+20 |
| * | Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions" | Hrvoje Varga | 2016-05-12 | 1 | -76/+0 |
| * | [mips][microMIPS] Implement CFC*, CTC* and LDC* instructions | Hrvoje Varga | 2016-05-11 | 1 | -0/+76 |
| * | [mips][microMIPS] Implement LWP and SWP instructions | Zlatko Buljan | 2016-05-09 | 1 | -0/+30 |
| * | [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions | Zlatko Buljan | 2016-05-06 | 1 | -4/+4 |
| * | [mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions | Zlatko Buljan | 2016-04-29 | 1 | -2/+2 |
| * | [mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU i... | Zlatko Buljan | 2016-04-27 | 1 | -1/+5 |
| * | [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV,... | Zlatko Buljan | 2016-04-27 | 1 | -5/+5 |
| * | [mips][microMIPS] Revert commit r267137 | Hrvoje Varga | 2016-04-25 | 1 | -3/+1 |
| * | [mips][microMIPS] Revert commit r266861. | Zoran Jovanovic | 2016-04-22 | 1 | -59/+0 |
| * | [mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions | Hrvoje Varga | 2016-04-22 | 1 | -1/+3 |
| * | [mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions | Zlatko Buljan | 2016-04-22 | 1 | -0/+32 |
| * | [mips][microMIPS] Implement BGEC, BGEUC, BLTC, BLTUC, BEQC and BNEC instructions | Zoran Jovanovic | 2016-04-20 | 1 | -15/+55 |
| * | [mips][microMIPS]Implement CFC*, CTC* and LDC* instructions | Hrvoje Varga | 2016-04-20 | 1 | -0/+59 |
| * | [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, D... | Zlatko Buljan | 2016-04-13 | 1 | -4/+21 |
| * | [mips] Trivial corrections to range checked immediates. | Daniel Sanders | 2016-04-11 | 1 | -2/+2 |
| * | [mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD* instru... | Zlatko Buljan | 2016-04-08 | 1 | -1/+1 |
| * | [mips][microMIPS] Revert commits r264245 and r264248. | Zoran Jovanovic | 2016-04-02 | 1 | -21/+4 |
| * | [mips][microMIPS] Implement MFC*, MFHC* and DMFC* instructions | Zlatko Buljan | 2016-03-31 | 1 | -1/+65 |
| * | [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, D... | Zlatko Buljan | 2016-03-24 | 1 | -4/+21 |
| * | [mips][microMIPS] Implement MTC*, MTHC* and DMTC* instructions | Hrvoje Varga | 2016-03-24 | 1 | -0/+78 |
| * | [mips] Range check simm7. | Daniel Sanders | 2016-03-22 | 1 | -1/+1 |
| * | [mips][microMIPS] Prevent usage of OR16_MMR6 instruction when code for microM... | Zoran Jovanovic | 2016-03-04 | 1 | -1/+1 |
