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| author | Denis Shienkov <denis.shienkov@gmail.com> | 2021-02-11 16:34:26 +0300 |
|---|---|---|
| committer | Denis Shienkov <denis.shienkov@gmail.com> | 2021-02-11 15:50:56 +0000 |
| commit | 16ddd8d9159313a2564a74b771b12fc12ff2cf4a (patch) | |
| tree | 583e73449e1ededea72c53a8f060ae7385a2618c | |
| parent | 355cd904ac66bf35c58a73b03db6132e2e182f8c (diff) | |
baremetal: Pass tests for RISC-V architecture for GCC toolchain
Change-Id: If2d249031a5fc1f1fdcdb0414d9cf43607505bf4
Reviewed-by: Ivan Komissarov <ABBAPOH@gmail.com>
| -rw-r--r-- | tests/auto/blackbox/testdata-baremetal/BareMetalProduct.qbs | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/tests/auto/blackbox/testdata-baremetal/BareMetalProduct.qbs b/tests/auto/blackbox/testdata-baremetal/BareMetalProduct.qbs index 38e986077..4ec613e93 100644 --- a/tests/auto/blackbox/testdata-baremetal/BareMetalProduct.qbs +++ b/tests/auto/blackbox/testdata-baremetal/BareMetalProduct.qbs @@ -150,4 +150,9 @@ Product { && qbs.architecture === "m32r" cpp.driverFlags: ["-nostdlib"] } + Properties { + condition: qbs.toolchain.contains("gcc") + && qbs.architecture === "riscv" + cpp.driverFlags: ["-nostdlib"] + } } |