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authorDenis Shienkov <denis.shienkov@gmail.com>2021-02-05 15:22:23 +0300
committerDenis Shienkov <denis.shienkov@gmail.com>2021-02-05 13:23:48 +0000
commit274c3819eaf72e8d488287cf6b25791dc4f0228f (patch)
tree0a525f75a1f910969b2562d78d438d41092539ef
parent9dece749823e8515f43525dd355924c8691d7714 (diff)
baremetal: Pass tests for RISC-V architecture for IAR toolchain
Change-Id: I9a7a0239370ff3d309dc91868b2058cc6616149c Reviewed-by: Ivan Komissarov <ABBAPOH@gmail.com>
-rw-r--r--tests/auto/blackbox/testdata-baremetal/BareMetalProduct.qbs8
-rw-r--r--tests/auto/blackbox/testdata-baremetal/one-object-asm-application/one-object-asm-application.qbs2
-rw-r--r--tests/auto/blackbox/testdata-baremetal/one-object-asm-application/riscv-iar.s7
3 files changed, 17 insertions, 0 deletions
diff --git a/tests/auto/blackbox/testdata-baremetal/BareMetalProduct.qbs b/tests/auto/blackbox/testdata-baremetal/BareMetalProduct.qbs
index e97b37ee9..f90178f1f 100644
--- a/tests/auto/blackbox/testdata-baremetal/BareMetalProduct.qbs
+++ b/tests/auto/blackbox/testdata-baremetal/BareMetalProduct.qbs
@@ -91,6 +91,14 @@ Product {
]
}
Properties {
+ condition: qbs.toolchain.contains("iar")
+ && qbs.architecture === "riscv"
+ cpp.driverLinkerFlags: [
+ "--config_def", "CSTACK_SIZE=0x1000",
+ "--config_def", "HEAP_SIZE=0x1000"
+ ]
+ }
+ Properties {
condition: qbs.toolchain.contains("keil")
&& qbs.architecture.startsWith("arm")
&& cpp.compilerName.startsWith("armcc")
diff --git a/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/one-object-asm-application.qbs b/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/one-object-asm-application.qbs
index 27ba502b6..71f004199 100644
--- a/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/one-object-asm-application.qbs
+++ b/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/one-object-asm-application.qbs
@@ -48,6 +48,8 @@ BareMetalApplication {
return true;
if (qbs.architecture === "m32c")
return true;
+ if (qbs.architecture === "riscv")
+ return true;
} else if (qbs.toolchainType === "sdcc") {
if (qbs.architecture === "mcs51")
return true;
diff --git a/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/riscv-iar.s b/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/riscv-iar.s
new file mode 100644
index 000000000..e19fdfddb
--- /dev/null
+++ b/tests/auto/blackbox/testdata-baremetal/one-object-asm-application/riscv-iar.s
@@ -0,0 +1,7 @@
+ PUBLIC main
+ SECTION `.text`:CODE:REORDER:NOROOT(2)
+ CODE
+main:
+ MV A0, ZERO
+ RET
+ END