diff options
author | Denis Shienkov <denis.shienkov@gmail.com> | 2021-01-18 14:57:52 +0300 |
---|---|---|
committer | Denis Shienkov <denis.shienkov@gmail.com> | 2021-01-21 08:18:52 +0000 |
commit | f7e98f94a7ca3e0decdc2eb5e5e3b90f3fc64480 (patch) | |
tree | 26ba0cb23629a5881e24d65d65c3f111b4806b38 | |
parent | 16d4c79ec8ccaf9968103c75283272ac54aa8c2d (diff) |
baremetal: Add support for HCS12 architectures to IAR toolchain
This patch adds the HCS12 architectures, provided
by Freescale Semiconductor:
* https://en.wikipedia.org/wiki/Motorola_68HC12
Change-Id: I9083bac9997e0dec50e0392040ce63beaa8a8f05
Reviewed-by: Ivan Komissarov <ABBAPOH@gmail.com>
-rw-r--r-- | doc/reference/modules/qbs-module.qdoc | 3 | ||||
-rw-r--r-- | share/qbs/modules/cpp/iar.js | 19 | ||||
-rw-r--r-- | src/app/qbs-setup-toolchains/iarewprobe.cpp | 9 |
3 files changed, 24 insertions, 7 deletions
diff --git a/doc/reference/modules/qbs-module.qdoc b/doc/reference/modules/qbs-module.qdoc index 6c4fbec0d..9f8db9f33 100644 --- a/doc/reference/modules/qbs-module.qdoc +++ b/doc/reference/modules/qbs-module.qdoc @@ -335,6 +335,9 @@ \li 16-bit compact RISC architecture microcontroller family developed by National Semiconductor \row + \li \c{"hcs12"} + \li 16-bit HC12 and S12 microcontroller family from Freescale Semiconductor + \row \li \c{"ia64"} \li 64-bit ISA architecture of the Itanium family processors developed by Intel diff --git a/share/qbs/modules/cpp/iar.js b/share/qbs/modules/cpp/iar.js index f1c41fe64..2928aa2f8 100644 --- a/share/qbs/modules/cpp/iar.js +++ b/share/qbs/modules/cpp/iar.js @@ -43,7 +43,7 @@ function supportXLinker(architecture) { || architecture === "msp430" || architecture === "v850" || architecture === "m68k" || architecture === "m32c" || architecture === "r32c" || architecture === "m16c" - || architecture === "cr16"; + || architecture === "cr16" || architecture === "hcs12"; } function supportILinker(architecture) { @@ -59,7 +59,7 @@ function supportXArchiver(architecture) { || architecture === "78k" || architecture === "avr32" || architecture === "m68k" || architecture === "m32c" || architecture === "r32c" || architecture === "m16c" - || architecture === "cr16"; + || architecture === "cr16" || architecture === "hcs12"; } function supportIArchiver(architecture) { @@ -94,6 +94,8 @@ function architectureCode(architecture) { return "34"; case "cr16": return "45"; + case "hcs12": + return "12"; case "rh850": case "rl78": case "rx": case "stm8": case "sh": case "riscv": return ""; default: @@ -141,6 +143,8 @@ function compilerName(qbs) { return "iccm16c"; else if (architecture === "cr16") return "icccr16c"; + else if (architecture === "hcs12") + return "icchcs12"; throw "Unable to deduce compiler name for unsupported architecture: '" + architecture + "'"; } @@ -183,6 +187,8 @@ function assemblerName(qbs) { return "am16c"; else if (architecture === "cr16") return "acr16c"; + else if (architecture === "hcs12") + return "ahcs12"; throw "Unable to deduce assembler name for unsupported architecture: '" + architecture + "'"; } @@ -307,6 +313,8 @@ function guessArchitecture(macros) { return "m16c"; else if (macros["__ICCCR16C__"] === "1") return "cr16"; + else if (macros["__ICCHCS12__"] === "1") + return "hcs12"; } function guessEndianness(macros) { @@ -327,7 +335,7 @@ function guessVersion(macros, architecture) || architecture === "rh850" || architecture === "v850" || architecture === "78k" || architecture === "avr32" || architecture === "sh" || architecture === "riscv" || architecture === "m68k" || architecture === "m32c" || architecture === "r32c" - || architecture === "m16c" || architecture === "cr16") { + || architecture === "m16c" || architecture === "cr16" || architecture === "hcs12") { return { major: parseInt(version / 100), minor: parseInt(version % 100), patch: 0 } @@ -356,6 +364,7 @@ function cppLanguageOption(compilerFilePath) { case "iccr32c": case "iccm16c": case "icccr16c": + case "icchcs12": return "--ec++"; } throw "Unable to deduce C++ language option for unsupported compiler: '" @@ -587,7 +596,7 @@ function compilerFlags(project, product, input, outputs, explicitlyDependsOn) { args.push("--no_warnings"); break; case "all": - if (architecture !== "78k") { + if (architecture !== "78k" && architecture !== "hcs12") { if (architecture !== "avr32" && architecture !== "r32c" && architecture !== "sh" && architecture !== "m16c") { args.push("--deprecated_feature_warnings=" @@ -638,7 +647,7 @@ function compilerFlags(project, product, input, outputs, explicitlyDependsOn) { || architecture === "avr32" || architecture === "sh" || architecture === "m68k" || architecture === "m32c" || architecture === "r32c" || architecture === "m16c" - || architecture === "cr16") { + || architecture === "cr16" || architecture === "hcs12") { args.push("--ec++"); } } diff --git a/src/app/qbs-setup-toolchains/iarewprobe.cpp b/src/app/qbs-setup-toolchains/iarewprobe.cpp index 4f87590a6..8614f4818 100644 --- a/src/app/qbs-setup-toolchains/iarewprobe.cpp +++ b/src/app/qbs-setup-toolchains/iarewprobe.cpp @@ -65,7 +65,8 @@ static QStringList knownIarCompilerNames() QStringLiteral("iccavr32"), QStringLiteral("iccsh"), QStringLiteral("iccriscv"), QStringLiteral("icccf"), QStringLiteral("iccm32c"), QStringLiteral("iccr32c"), - QStringLiteral("iccm16c"), QStringLiteral("icccr16c")}; + QStringLiteral("iccm16c"), QStringLiteral("icccr16c"), + QStringLiteral("icchcs12")}; } static QString guessIarArchitecture(const QFileInfo &compiler) @@ -107,6 +108,8 @@ static QString guessIarArchitecture(const QFileInfo &compiler) return QStringLiteral("m16c"); if (baseName == QLatin1String("icccr16c")) return QStringLiteral("cr16"); + if (baseName == QLatin1String("icchcs12")) + return QStringLiteral("hcs12"); return {}; } @@ -190,7 +193,8 @@ static Version dumpIarCompilerVersion(const QFileInfo &compiler) || arch == QLatin1String("m32c") || arch == QLatin1String("r32c") || arch == QLatin1String("m16c") - || arch == QLatin1String("rc16")) { + || arch == QLatin1String("rc16") + || arch == QLatin1String("hcs12")) { return Version{verCode / 100, verCode % 100}; } @@ -249,6 +253,7 @@ static std::vector<ToolchainInstallInfo> installedIarsFromRegistry() {QStringLiteral("EWR32C"), QStringLiteral("/r32c/bin/iccr32c.exe")}, {QStringLiteral("EWM16C"), QStringLiteral("/m16c/bin/iccm16c.exe")}, {QStringLiteral("EWCR16C"), QStringLiteral("/cr16c/bin/icccr16c.exe")}, + {QStringLiteral("EWHCS12"), QStringLiteral("/hcs12/bin/icchcs12.exe")}, }; QSettings registry(QLatin1String(kRegistryNode), QSettings::NativeFormat); |